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Product details

Parameters

Technology Family AS Function Encoder, Multiplexer Configuration 2:1 Channels (#) 4 VCC (Min) (V) 4.5 VCC (Max) (V) 5.5 Input type TTL Output type TTL open-in-new Find other Encoders & decoders

Package | Pins | Size

PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6 open-in-new Find other Encoders & decoders

Features

  • Selects One of Two 4-Bit Data Sources and Synchronously Stores Data With System Clock
  • Applications:
    • Dual Source for Operands and Constants in Arithmetic Processor; Can Release Processor Register Files for Acquiring New Data
    • Implements Separate Registers Capable of Parallel Exchange of Contents, Yet Retains External Load Capability
    • Has Universal-Type Register for Implementing Various Shift Patterns, Including Compound Left-Right Capability
  • Package Options Include Plastic Small-Outline (D) Packages and Standard Plastic (N) 300-mil DIPs
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Description

The SN74AS298A is a quadruple 2-input multiplexer with storage that provides essentially the equivalent functional capabilities of two separate MSI functions (SN74AS157 and ´AS175A) in a 16-pin package.

When the word-select (WS) input is low, word 1 (A1, B1, C1, D1) is applied to the flip-flops. A high input to WS causes the selection of word 2 (A2, B2, C2, D2). The selected word is clocked to the output terminals on the negative-going edge of the clock pulse.

The SN74AS298A is characterized for operation from 0°C to 70°C.

 

 

a1, a2, etc. = the level of steady-state input at A1, A2, etc.
QA0, QB0, etc. = the level of QA, QB, etc. entered on the most recent transition of CLK

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 12
Type Title Date
* Datasheet Quadruple 2-Input Multiplexer With Storage datasheet (Rev. B) Dec. 01, 1994
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes Designing With Logic (Rev. C) Jun. 01, 1997
Application notes Advanced Schottky Load Management Feb. 01, 1997
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
Application notes Advanced Schottky (ALS and AS) Logic Families Aug. 01, 1995

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

CAD/CAE symbols

Package Pins Download
PDIP (N) 16 View options
SOIC (D) 16 View options

Ordering & quality

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