The TCAN4551-Q1 is a CAN FD controller with an integrated CAN FD transceiver supporting data rates up to 8 Mbps. The CAN FD controller meets the specifications of the ISO11898-1:2015 high speed controller area network (CAN) data link layer and meets the physical layer requirements of the ISO11898–2:2016 high speed CAN specification. The TCAN4551-Q1 provides an interface between the CAN bus and the system processor through serial peripheral interface (SPI), supporting both classic CAN and CAN FD, allowing port expansion of CAN and CAN FD or CAN support with processors that do not support CAN FD. The TCAN4551-Q1 provides CAN FD transceiver functionality: differential transmit capability to the bus and differential receive capability from the bus. The device supports wake up via local wake up (LWU) and bus wake using the CAN bus implementing the ISO11898-2:2016 Wake Up Pattern (WUP).
The device includes many protection features providing device and CAN bus robustness. These features include failsafe features, internal dominant state timeout and wide bus operating range as examples.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | TCAN4551-Q1 Automotive Control Area Network Flexible Data Rate (CAN FD) Controller with Integrated Transceiver datasheet (Rev. A) | PDF | HTML | Nov 1, 2019 |
| Application note | TCAN455x-Q1 Peripheral Circuit and Clock Design Application Note | PDF | HTML | Jul 15, 2026 | |
| Application note | Comparison of CAN, CAN FD, and CAN XL | PDF | HTML | Jun 18, 2026 | |
| Application note | Protecting Automotive CAN Bus Systems From ESD Overvoltage Events | PDF | HTML | Apr 27, 2022 | |
| Application note | TCAN455x Clock Optimization and Design Guidelines | PDF | HTML | Jul 26, 2021 | |
| Application note | TCAN4550 Watchdog Configuration Guide | May 1, 2019 |
For additional terms or required resources, click any title below to view the detail page where available.
The EVM can be used to evaluate the TCAN4550 SPI to CAN FD Controller and Transceiver solution. The CAN bus signals are easily accessed via a DB9 connector (or via header pins), and the digital interface (SPI lines plus GPIOs) is accessible via a single dual-row header. Input clocks to (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RGY) | 20 | Ultra Librarian |
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