Product details

Architecture Voltage FB Number of channels (#) 2 Total supply voltage (Min) (+5V=5, +/-5V=10) 10 Total supply voltage (Max) (+5V=5, +/-5V=10) 30 GBW (Typ) (MHz) 290 BW @ Acl (MHz) 290 Acl, min spec gain (V/V) 1 Slew rate (Typ) (V/us) 310 Vn at flatband (Typ) (nV/rtHz) 7.5 Vn at 1 kHz (Typ) (nV/rtHz) 7.5 Iq per channel (Typ) (mA) 7.8 Vos (offset voltage @ 25 C) (Max) (mV) 6 Rail-to-rail No Rating Catalog Operating temperature range (C) -40 to 85, 0 to 70 CMRR (Typ) (dB) 110 Input bias current (Max) (pA) 6000000 Offset drift (Typ) (uV/C) 15 Output current (Typ) (mA) 110 2nd harmonic (dBc) 80 3rd harmonic (dBc) 80 @ MHz 1
Architecture Voltage FB Number of channels (#) 2 Total supply voltage (Min) (+5V=5, +/-5V=10) 10 Total supply voltage (Max) (+5V=5, +/-5V=10) 30 GBW (Typ) (MHz) 290 BW @ Acl (MHz) 290 Acl, min spec gain (V/V) 1 Slew rate (Typ) (V/us) 310 Vn at flatband (Typ) (nV/rtHz) 7.5 Vn at 1 kHz (Typ) (nV/rtHz) 7.5 Iq per channel (Typ) (mA) 7.8 Vos (offset voltage @ 25 C) (Max) (mV) 6 Rail-to-rail No Rating Catalog Operating temperature range (C) -40 to 85, 0 to 70 CMRR (Typ) (dB) 110 Input bias current (Max) (pA) 6000000 Offset drift (Typ) (uV/C) 15 Output current (Typ) (mA) 110 2nd harmonic (dBc) 80 3rd harmonic (dBc) 80 @ MHz 1
HVSSOP (DGN) 8 9 mm² 3 x 3 SOIC (D) 8 19 mm² 3.91 x 4.9
  • High Speed
    • 290-MHz Bandwidth (G = 1, –3 dB)
    • 310-V/ms Slew Rate
    • 37-ns Settling Time (0.1%)
  • Low Distortion
    • THD = –80 dBc (f = 1 MHz, RL = 150 )
  • 110-mA Output Current Drive (Typical)
  • 7.5-nV/√Hz Voltage Noise
  • Excellent Video Performance
    • 70-MHz Bandwidth (0.1 dB, G = 1)
    • 0.006% Differential Gain Error
    • ±5-V to ±15-V Supply Voltage
  • Available in Standard SOIC, MSOP PowerPAD, JG, or FK Packages
  • Evaluation Module Available

  • High Speed
    • 290-MHz Bandwidth (G = 1, –3 dB)
    • 310-V/ms Slew Rate
    • 37-ns Settling Time (0.1%)
  • Low Distortion
    • THD = –80 dBc (f = 1 MHz, RL = 150 )
  • 110-mA Output Current Drive (Typical)
  • 7.5-nV/√Hz Voltage Noise
  • Excellent Video Performance
    • 70-MHz Bandwidth (0.1 dB, G = 1)
    • 0.006% Differential Gain Error
    • ±5-V to ±15-V Supply Voltage
  • Available in Standard SOIC, MSOP PowerPAD, JG, or FK Packages
  • Evaluation Module Available

The THS4011 and THS4012 are high-speed, single/dual, voltage feedback amplifiers ideal for a wide range of applications. The devices offer good ac performance, with 290-MHz bandwidth, 310-V/µs slew rate, and 37-ns settling time (0.1%). These amplifiers have a high output drive capability of 110 mA and draw only 7.8-mA supply current per channel. For applications requiring low distortion, the THS4011/4012 operate with a total harmonic distortion (THD) of -80 dBc at f = 1 MHz. For video applications, the THS4011/4012 offer 0.1-dB gain flatness to 70 MHz, 0.006% differential gain error, and 0.01° differential phase error.

The THS4011 and THS4012 are high-speed, single/dual, voltage feedback amplifiers ideal for a wide range of applications. The devices offer good ac performance, with 290-MHz bandwidth, 310-V/µs slew rate, and 37-ns settling time (0.1%). These amplifiers have a high output drive capability of 110 mA and draw only 7.8-mA supply current per channel. For applications requiring low distortion, the THS4011/4012 operate with a total harmonic distortion (THD) of -80 dBc at f = 1 MHz. For video applications, the THS4011/4012 offer 0.1-dB gain flatness to 70 MHz, 0.006% differential gain error, and 0.01° differential phase error.

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Technical documentation

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Type Title Date
* Data sheet 290-MHz Low-Distortion High-Speed Amplifiers datasheet (Rev. E) 12 Apr 2010
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 Jan 2005
User guide THS4012 Dual High-Speed Op Amp EVM User's Guide 07 May 1999

Design & development

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Simulation model

THS4012 PSpice Model

SLOJ142.ZIP (6 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
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Calculation tool

VOLT-DIVIDER-CALC — Voltage Divider Determines A Set of Resistors for a Voltage Divider

VOLT-DIVIDER-CALC quickly determines a set of resistors for a voltage divider. This KnowledgeBase Javascript utility can be used to find a set of resistors for a voltage divider to achieve the desired output voltage. This calculator can also be used to design non-inverting attentuation circuits.

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HVSSOP (DGN) 8 View options
SOIC (D) 8 View options

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