Gehäuseinformationen
| Gehäuse | Pins TSSOP (PW) | 16 |
| Betriebstemperaturbereich (°C) -40 to 85 |
| Gehäusemenge | Träger 2.000 | LARGE T&R |
Merkmale von 74AC11138
- Designed specifically for high-speed memory decoders and data transmission systems
- Incorporates three enable inputs to simplify cascading and/or data reception
- Center-Pin VCC and GND configurations minimize high-speed switching noise
- EPIC ™ (Enhanced-Performance Implanted CMOS) 1-µm process
- 500-mA typical latch-up immunity at 125 °C
- Package options include plastic small-outline (D) and thin shrink small-outline (PW) packages, and standard plastic 300-mil DIPs (N)
Beschreibung von 74AC11138
The 74AC11138 circuit is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times.