Produktdetails

Sample rate (max) (Msps) 80 Resolution (Bits) 12 Number of input channels 2 Interface type Parallel CMOS, TTL Analog input BW (MHz) 600 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 447 Architecture Pipeline SNR (dB) 69.3 ENOB (bit) 11 SFDR (dB) 82 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 80 Resolution (Bits) 12 Number of input channels 2 Interface type Parallel CMOS, TTL Analog input BW (MHz) 600 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 447 Architecture Pipeline SNR (dB) 69.3 ENOB (bit) 11 SFDR (dB) 82 Operating temperature range (°C) -40 to 85 Input buffer No
TQFP (PAG) 64 144 mm² 12 x 12
  • Single +3.3V Supply Operation
  • Internal Sample-and-Hold
  • Internal or External Reference
  • Outputs 2.4V to 3.6V Compatible
  • Power Down Mode
  • Duty Cycle Stabilizer
  • Pin Compatible with ADC12DL040, ADC12DL065, ADC12DL066

Key Specifications

  • Resolution: 12 Bits
  • Max Conversion Rate: 80 MSPS
  • DNL: ±0.4 LSB (typ)
  • SNR (fIN=40MHz): 69 dB (typ)
  • SNR (fIN=200MHz): 67 dB(typ)
  • SFDR (fIN=40MHz): 82 dB (typ)
  • SFDR (fIN=200MHz): 81 dB (typ)
  • Power Consumption
    • Operating: 447 mW (typ)
    • Power Down Mode: 50 mW (typ)

All trademarks are the property of their respective owners.

  • Single +3.3V Supply Operation
  • Internal Sample-and-Hold
  • Internal or External Reference
  • Outputs 2.4V to 3.6V Compatible
  • Power Down Mode
  • Duty Cycle Stabilizer
  • Pin Compatible with ADC12DL040, ADC12DL065, ADC12DL066

Key Specifications

  • Resolution: 12 Bits
  • Max Conversion Rate: 80 MSPS
  • DNL: ±0.4 LSB (typ)
  • SNR (fIN=40MHz): 69 dB (typ)
  • SNR (fIN=200MHz): 67 dB(typ)
  • SFDR (fIN=40MHz): 82 dB (typ)
  • SFDR (fIN=200MHz): 81 dB (typ)
  • Power Consumption
    • Operating: 447 mW (typ)
    • Power Down Mode: 50 mW (typ)

All trademarks are the property of their respective owners.

The ADC12DL080 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 80 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 600 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC12DL080 achieves 11.0 effective bits at Nyquist and consumes just 447mW at 80 MSPS. The Power Down feature reduces power consumption to 50 mW.

The differential inputs provide a full scale differential input swing equal to 2 times VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. Duty cycle stabilization and output data format are selectable. The output data can be set for offset binary or two's complement.

To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC12DL080 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage. This device is available in the 64-lead TQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to ease the evaluation process.

The ADC12DL080 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 80 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption while providing excellent dynamic performance and a 600 MHz Full Power Bandwidth. Operating on a single +3.3V power supply, the ADC12DL080 achieves 11.0 effective bits at Nyquist and consumes just 447mW at 80 MSPS. The Power Down feature reduces power consumption to 50 mW.

The differential inputs provide a full scale differential input swing equal to 2 times VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. Duty cycle stabilization and output data format are selectable. The output data can be set for offset binary or two's complement.

To ease interfacing to lower voltage systems, the digital output driver power pins of the ADC12DL080 can be connected to a separate supply voltage in the range of 2.4V to the analog supply voltage. This device is available in the 64-lead TQFP package and will operate over the industrial temperature range of −40°C to +85°C. An evaluation board is available to ease the evaluation process.

Herunterladen Video mit Transkript ansehen Video

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 3
Typ Titel Datum
* Data sheet ADC12DL080 Dual 12-Bit, 80 MSPS, A/D Converter for IF Sampling datasheet (Rev. A) 19 Apr 2013
Application note Selecting Amplifiers, ADCs, and Clocks for High-Performance Signal Paths 13 Sep 2007
White paper Intermediate Frequency (IF) Sampling Receiver Concepts 31 Mai 2006

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Gehäuse Pins Herunterladen
TQFP (PAG) 64 Optionen anzeigen

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos