Gehäuseinformationen
| Gehäuse | Pins VQFNP (RMP) | 72 |
| Betriebstemperaturbereich (°C) -40 to 85 |
| Gehäusemenge | Träger 1.500 | LARGE T&R |
Merkmale von ADC32RF82
- 14-Bit, Dual-Channel, 2457.6-MSPS ADC
- Noise Floor: –154.1 dBFS/Hz
- RF Input Supports Up to 4.0 GHz
- Aperture Jitter: 90 fS
- Channel Isolation: 95 dB at fIN = 1.8 GHz
- Spectral Performance
(fIN = 900 MHz, –2 dBFS):
- SNR: 61.2 dBFS
- SFDR: 67-dBc HD2, HD3
- SFDR: 81-dBc Worst Spur
- Spectral Performance (fIN = 1.85
GHz, –2 dBFS):
- SNR: 58.7 dBFS
- SFDR: 71-dBc HD2, HD3
- SFDR: 76-dBc Worst Spur
- On-Chip Digital Down-Converters:
- Up to 4 DDCs (Dual-Band Mode)
- Up to 3 Independent NCOs per DDC
- On-Chip Input Clamp for Overvoltage Protection
- Programmable On-Chip Power Detectors with Alarm Pins for AGC Support
- On-Chip Dither
- On-Chip Input Termination
- Input Full-Scale: 1.35 VPP
- Support for Multi-Chip Synchronization
- JESD204B Interface:
- Subclass 1-Based Deterministic Latency
- 4 Lanes Per Channel at 12.5 Gbps
- Power Dissipation: 3.0 W/Ch at 2457.6 MSPS
- 72-Pin VQFN Package (10 mm × 10 mm)
Beschreibung von ADC32RF82
The ADC32RF82 is a 14-bit, 2457.6-MSPS, dual-channel telecom receiver and feedback device family that supports RF sampling with input frequencies up to 4 GHz and beyond. Designed for high signal-to-noise ratio (SNR), the ADC32RF82 delivers a noise spectral density of –154.1 dBFS/Hz as well as dynamic range and channel isolation over a large input frequency range. The buffered analog input with on-chip termination provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy.
Each channel can be connected to a dual-band, digital down-converter (DDC) with up to three independent, 16-bit numerically-controlled oscillators (NCOs) per DDC for phase-coherent frequency hopping. Additionally, the ADC is equipped with front-end peak and RMS power detectors and alarm functions to support external automatic gain control (AGC) algorithms.
The ADC32RF82 supports the JESD204B serial interface with subclass 1-based deterministic latency using data rates up to 12.5 Gbps with up to four lanes per ADC. The device is offered in a 72-pin VQFN package (10 mm × 10 mm) and supports the industrial temperature range (–40°C to +85°C).