Gehäuseinformationen
| Gehäuse | Pins SOIC (DW) | 24 |
| Betriebstemperaturbereich (°C) -55 to 125 |
| Gehäusemenge | Träger 2.000 | LARGE T&R |
Merkmale von CD74HCT154
- Two Enable Inputs to Facilitate Demultiplexing and Cascading Functions
- Fanout (Over Temperature Range)
- Standard Outputs . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . –55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL= 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il
1µA at VOL, VOH
Data sheet acquired from Harris Semiconductor
Beschreibung von CD74HCT154
The ’HC154 and ’HCT154 are 4-to-16 line decoders/demultiplexers with two enable inputs, E1 and E2. A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to select the output lines Y0\ to Y15\, and using one enable as the data input while holding the other enable low.