DAC5681Z

AKTIV

16-Bit-, 1,0-GSPS-, 1x-4x interpolierender Digital-Analog-Wandler (DAC)

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Datenblatt

document-pdfAcrobat 16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DAC. datasheet (Rev. G) (Englisch)

DAC5681Z

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Resolution (Bits)

16

Number of DAC channels

1

Interface type

Parallel LVDS

Sample/update rate (Msps)

1000

Features

Ultra High Speed

Rating

Catalog

Interpolation

1x, 2x, 4x

Power consumption (typ) (mW)

800

SFDR (dB)

81

Architecture

Current Sink

Operating temperature range (°C)

-40 to 85

Reference type

Int

Resolution (Bits)

16

Number of DAC channels

1

Interface type

Parallel LVDS

Sample/update rate (Msps)

1000

Features

Ultra High Speed

Rating

Catalog

Interpolation

1x, 2x, 4x

Power consumption (typ) (mW)

800

SFDR (dB)

81

Architecture

Current Sink

Operating temperature range (°C)

-40 to 85

Reference type

Int

VQFN (RGC)

64

81 mm² (9 mm × 9 mm)

16-Bit Digital-to-Analog Converter (DAC)
1.0 GSPS Update Rate
16-Bit Wideband Input LVDS Data Bus
- 8 Sample Input FIFO
High Performance
- 73-dBc ACLR WCDMA TM1 at 180 MHz
2x to 32x Clock Multiplying PLL/VCO
2x or 4x Interpolation Filters
- Stopband Transition 0.4–0.6 Fdata
- Filters Configurable in Either Low-Pass or
  High-Pass Mode
  - Allows Selection of Higher Order Image
On-Chip 1.2-V Reference
2 to 20-mA Differential Scalable Output
64-Pin 9-mm × 9-mm VQFN Package
APPLICATIONS
- Cellular Base Stations
- Broadband Wireless Access (BWA)
- WiMAX 802.16
- Fixed Wireless Backhaul
- Cable Modem Termination System (CMTS)

All other trademarks are the property of their respective owners

16-Bit Digital-to-Analog Converter (DAC)
1.0 GSPS Update Rate
16-Bit Wideband Input LVDS Data Bus
- 8 Sample Input FIFO
High Performance
- 73-dBc ACLR WCDMA TM1 at 180 MHz
2x to 32x Clock Multiplying PLL/VCO
2x or 4x Interpolation Filters
- Stopband Transition 0.4–0.6 Fdata
- Filters Configurable in Either Low-Pass or
  High-Pass Mode
  - Allows Selection of Higher Order Image
On-Chip 1.2-V Reference
2 to 20-mA Differential Scalable Output
64-Pin 9-mm × 9-mm VQFN Package
APPLICATIONS
- Cellular Base Stations
- Broadband Wireless Access (BWA)
- WiMAX 802.16
- Fixed Wireless Backhaul
- Cable Modem Termination System (CMTS)

All other trademarks are the property of their respective owners

The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x to 4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity, noise, crosstalk, and PLL phase noise performance.

The DAC5681Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by on-board 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

The DAC5681Z is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin VQFN package. Other members of the family include the dual-channel, interpolating DAC5682Z and the single-channel, non-interpolating DAC5681.

The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input, integrated 2x to 4x interpolation filters, on-board clock multiplier, and internal voltage reference. The DAC5681Z offers superior linearity, noise, crosstalk, and PLL phase noise performance.

The DAC5681Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by on-board 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

The DAC5681Z is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin VQFN package. Other members of the family include the dual-channel, interpolating DAC5682Z and the single-channel, non-interpolating DAC5681.

filter

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Technische Dokumentation

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Top-Dokumentation	Typ	Titel	Datum
*	Datenblatt	16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DAC. datasheet (Rev. G)	03.12.2015
	Anwendungshinweis	High Speed, Digital-to-Analog Converters Basics (Rev. A)	23.10.2012
	Benutzerhandbuch	TSW1400 Pattern Generators	03.05.2012
	Anwendungshinweis	Passive Terminations for Current Output DACs	10.11.2008
	Anwendungshinweis	CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters	08.06.2008
	Anwendungshinweis	Phase Noise Performance and Jitter Cleaning Ability of CDCE72010	02.06.2008

Design und Entwicklung

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Die DAC5681ZEVM ist eine Leiterplatte, mit der Entwickler die Leistung des einkanaligen 16-Bit-Digital-Analog-Wandlers (DAC) mit 1,0 GSPS von Texas Instruments evaluieren können. Der DAC verfügt über eine LVDS-Schnittstelle mit 1 GSPS, integrierte 2x/4x Interpolationsfilter, einen integrierten (...)

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Evaluierungsplatine

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Von: Abaco Systems

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Von: Abaco Systems

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