Gehäuseinformationen
| Gehäuse | Pins PBGA (ZPC) | 516 |
| Betriebstemperaturbereich (°C) 0 to 55 |
| Gehäusemenge | Träger 40 | JEDEC TRAY (5+1) |
Merkmale von DLPC4430
- Single DLP controller support for up to WUXGA resolution display using digital micromirror devices (DMDs):
- Up to 1920× 1200 at 120Hz (2D and 3D)
- Provides single 30-bit or dual 60-bit input pixel interface:
- RGB data format
- 8, 9, or 10 bits per color
- Pixel clock up to 320 MHz in dual 30-bit mode on a single controller
- High-speed, low voltage differential signaling (LVDS) DMD interface
- 150-MHz ARM946™ microprocessor
- Microprocessor peripherals
- Programmable pulse-width modulation (PWM) and capture timers
- Three I2C ports, three UART ports and three SSP ports
- One USB 1.1 secondary port
- Image processing
- Multiple image processing algorithms
- Frame rate conversion
- Color coordinate adjustment
- Programmable color space conversion
- Programmable degamma and splash
- Integrated support for 3-D display
- 2-D keystone correction
- Integrated clock generation circuitry
- Operates on a single 20-MHz crystal
- Integrated spread spectrum clocking
- External memory support
- Parallel flash for microprocessor and PWM sequence
- 516-pin plastic ball grid array package
- Supports LED and laser hybrid illuminations
Beschreibung von DLPC4430
The DLPC4430 is a digital display controller for the DLP display chipset. The chipset comprises the DLPC4430 display controller, the DLP digital micromirror device (DMD), the DLPA100controller power management device, and the DLPA300DMD micromirror driver (refer to the DMD data sheet). This solution is a great fit for display systems that require high resolution, high brightness, and system simplicity. To ensure reliable operation, the DLPC4430 display controller must always be used with a DLP DMD and respective DLP power management devices.