Produktdetails

Frequency (max) (MHz) 30000 Frequency (min) (MHz) 5 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Phase synchronization, Programmable output power, SYSREF support (Compliant to JESD204B standard), Space grade Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) to Rating Space Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 30000 Frequency (min) (MHz) 5 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Phase synchronization, Programmable output power, SYSREF support (Compliant to JESD204B standard), Space grade Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) to Rating Space Lock time (µs) (typ) (s) Loop BW dependent
HTQFP (PAP) 64 144 mm² (12 mm × 12 mm)
  • VID #V62/25658
    • Total ionizing dose 50Krad (ELDRS-free)
    • Single event latch-up (SEL) immune up to 43MeV-cm2/mg
  • Wide band frequency synthesizer : 5MHz to 30GHz output frequency
  • –102dBc/Hz phase noise at 100kHz offset with 30GHz carrier
  • 62fs RMS jitter at 30GHz (1kHz to 100MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency in fractional mode.
  • Synchronization of output phase across multiple devices
  • Independent mute pins for RFoutA and RFoutB outputs
  • Support for SYSREF with programmable delay
  • 3.3V single power supply operation
  • Pin-mode: Pin configurable N divider and output divider in Integer PLL mode
  • 10 × 10mm² 64 lead QFP package
  • Operating temperature range: –55°C to +125°C
  • Supported by PLLatinum™ Simulator design tool
  • High Reliability
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Extended Product Life Cycle
    • Product Traceability
    • Outgassing test performed per ASTM E595
  • VID #V62/25658
    • Total ionizing dose 50Krad (ELDRS-free)
    • Single event latch-up (SEL) immune up to 43MeV-cm2/mg
  • Wide band frequency synthesizer : 5MHz to 30GHz output frequency
  • –102dBc/Hz phase noise at 100kHz offset with 30GHz carrier
  • 62fs RMS jitter at 30GHz (1kHz to 100MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency in fractional mode.
  • Synchronization of output phase across multiple devices
  • Independent mute pins for RFoutA and RFoutB outputs
  • Support for SYSREF with programmable delay
  • 3.3V single power supply operation
  • Pin-mode: Pin configurable N divider and output divider in Integer PLL mode
  • 10 × 10mm² 64 lead QFP package
  • Operating temperature range: –55°C to +125°C
  • Supported by PLLatinum™ Simulator design tool
  • High Reliability
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Extended Product Life Cycle
    • Product Traceability
    • Outgassing test performed per ASTM E595

The LMX2695-SEP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) that can output any frequency from 5MHz to 30GHz. The VCO on this device covers an entire octave so the frequency coverage is complete down to 5MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2695-SEP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in use cases including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B/C standard), making the device designed for low-noise clock source for high-speed data converters.

This device is fabricated in Texas Instruments’ advanced BiCMOS process and is available in a 64-lead QFP plastic package.

The LMX2695-SEP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) that can output any frequency from 5MHz to 30GHz. The VCO on this device covers an entire octave so the frequency coverage is complete down to 5MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2695-SEP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in use cases including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B/C standard), making the device designed for low-noise clock source for high-speed data converters.

This device is fabricated in Texas Instruments’ advanced BiCMOS process and is available in a 64-lead QFP plastic package.

Herunterladen Video mit Transkript ansehen Video

Technische Dokumentation

Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 2
Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt LMX2695-SEP 5MHz to 30GHz Wideband Synthesizer With Phase Synchronization and JESD204B/C Support datasheet PDF | HTML 20.07.2026
Auswahlhilfe TI Space Products (Rev. L) 27.03.2026

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

LMX2695SEPEVM — LMX2695-SEP – Evaluierungsmodul

Mit dem LMX2695SEPEVM wird die Leistung des Bausteins LMX2695-SEP evaluiert. Bei diesem Baustein handelt es sich um einen strahlungsfesten HF-Synthesizer in einem 10 mm × 10 mm 64-poligen Kunststoffgehäuse. Dieser Baustein kann Dauerstrichsignale bis zu 28 GHz erzeugen. Das Evaluierungsmodul (...)
Benutzerhandbuch: PDF | HTML
Unterstützte Produkte und Hardware
Designtool

PLLATINUMSIM-SW — PLL-Schleifenfilter, Phasenrauschen, Sperrzeit und Spur-Simulationstool

PLLATINUMSIM-SW ist ein Simulationstool, mit dem Benutzer detaillierte Designs und Simulationen unserer integrierten PLLatinum™-Schaltkreisen erstellen können, einschließlich der LMX-Serie von phasenverriegelten Schleifen (PLLs) und Synthesizern.

Unterstützte Produkte und Hardware
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
HTQFP (PAP) 64 Ultra Librarian

Bestellen & Qualität

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos