SN54ABT541

AKTIV

8-Kanal-Puffer, 4,5 bis 5,5 V mit TTL-kompatiblen CMOS-Eingängen und Tri-State-Ausgängen für die Rüs

Produktdetails

Technology family ABT Number of channels 8 IOL (max) (mA) 48 Supply current (max) (µA) 250 IOH (max) (mA) -24 Input type TTL-Compatible CMOS Output type 3-State Features Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family ABT Number of channels 8 IOL (max) (mA) 48 Supply current (max) (µA) 250 IOH (max) (mA) -24 Input type TTL-Compatible CMOS Output type 3-State Features Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns) Rating Military Operating temperature range (°C) -55 to 125
LCCC (FK) 20 79.0321 mm² (— mm × — mm) CDIP (J) 20 167.464 mm² (— mm × — mm) CFP (W) 20 90.5828 mm² (— mm × — mm)
  • State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Impedance State During Power Up and Power Down
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (N) and Ceramic (J) DIPs

EPIC-IIB is a trademark of Texas Instruments.

  • State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Impedance State During Power Up and Power Down
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (N) and Ceramic (J) DIPs

EPIC-IIB is a trademark of Texas Instruments.

The SN54ABT541 and SN74ABT541B octal buffers and line drivers are ideal for driving bus lines or buffering memory address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.

The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state.

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT541 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT541B is characterized for operation from -40°C to 85°C.

The SN54ABT541 and SN74ABT541B octal buffers and line drivers are ideal for driving bus lines or buffering memory address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.

The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state.

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT541 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT541B is characterized for operation from -40°C to 85°C.

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt SN54ABT541, SN74ABT541B datasheet (Rev. L) 01.12.2006
* SMD SN54ABT541 SMD 5962-94718 21.06.2016

Design und Entwicklung

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
LCCC (FK) 20 Ultra Librarian
CDIP (J) 20 Ultra Librarian
CFP (W) 20 Ultra Librarian

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