SN54LS109A

AKTIV

Zweifache positiv flankengesteuerte J-K-Flipflops mit Preset und Clear

SN54LS109A

AKTIV

Produktdetails

Number of channels 2 Technology family LS Input type TTL Output type Push-Pull Clock frequency (MHz) 30 Supply current (max) (µA) 15000 IOL (max) (mA) -0.4 IOH (max) (mA) 8 Features Clear, High speed (tpd 10-50ns), Positive edge triggered, Preset Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 2 Technology family LS Input type TTL Output type Push-Pull Clock frequency (MHz) 30 Supply current (max) (µA) 15000 IOL (max) (mA) -0.4 IOH (max) (mA) 8 Features Clear, High speed (tpd 10-50ns), Positive edge triggered, Preset Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 16 135.3552 mm² (— mm × — mm) CFP (W) 16 69.319 mm² (— mm × — mm)
  • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
  • Dependable Texas Instruments Quality and Reliability
  • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
  • Dependable Texas Instruments Quality and Reliability

These devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K\ inputs meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K\ inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K\ and tying J high. They also can perform as D-type flip-flops if J and K\ are tied together.

The SN54109 and SN54LS109A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74109 and SN74LS109A are characterized for operation from 0°C to 70°C.

These devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K\ inputs meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K\ inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K\ and tying J high. They also can perform as D-type flip-flops if J and K\ are tied together.

The SN54109 and SN54LS109A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74109 and SN74LS109A are characterized for operation from 0°C to 70°C.

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt Dual J-K Positive-Edge-Triggered Flip-Flops With Preset And Clear datasheet 01.03.1988

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