SN74ALVTH16240

OBSOLET

16-Kanal-Wechselrichter, 2,3 bis 3,6 V mit Bus-Hold, TTL-kompatiblen CMOS-Eingängen und Tri-State-Au

SN74ALVTH16240

OBSOLET

Produktdetails

Technology family ALVT Number of channels 16 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 5000 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, Bus-hold, Over-voltage tolerant inputs Rating Catalog Operating temperature range (°C) -40 to 85
Technology family ALVT Number of channels 16 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 5000 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, Bus-hold, Over-voltage tolerant inputs Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm)
  • State-of-the-Art Advanced BiCMOS Technology (ABT) WidebusTM Design for 2.5-V and 3.3-V Operation and Low Static Power Dissipation
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC)
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • High Drive (-24/24 mA at 2.5-V and -32/64 mA at 3.3-V VCC)
  • Power Off Disables Outputs, Permitting Live Insertion
  • High-Impedance State During Power Up and Power Down Prevents Driver Conflict
  • Use Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating
  • Auto3-State Eliminates Bus Current Loading When Output Exceeds VCC + 0.5 V
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model; and Exceeds 1000 V Using Charged-Device Model, Robotic Method
  • Flow-Through Architecture Facilitates Printed Circuit Board Layout
  • Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
  • Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package

Widebus is a trademark of Texas Instruments Incorporated.

  • State-of-the-Art Advanced BiCMOS Technology (ABT) WidebusTM Design for 2.5-V and 3.3-V Operation and Low Static Power Dissipation
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC)
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • High Drive (-24/24 mA at 2.5-V and -32/64 mA at 3.3-V VCC)
  • Power Off Disables Outputs, Permitting Live Insertion
  • High-Impedance State During Power Up and Power Down Prevents Driver Conflict
  • Use Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating
  • Auto3-State Eliminates Bus Current Loading When Output Exceeds VCC + 0.5 V
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model; and Exceeds 1000 V Using Charged-Device Model, Robotic Method
  • Flow-Through Architecture Facilitates Printed Circuit Board Layout
  • Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
  • Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package

Widebus is a trademark of Texas Instruments Incorporated.

The 'ALVTH16240 devices are 16-bit buffers/line drivers designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The devices provide inverting outputs and symmetrical active-low output-enable (OE\) inputs.

When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN54ALVTH16240 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALVTH16240 is characterized for operation from -40°C to 85°C.

The 'ALVTH16240 devices are 16-bit buffers/line drivers designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The devices provide inverting outputs and symmetrical active-low output-enable (OE\) inputs.

When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN54ALVTH16240 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALVTH16240 is characterized for operation from -40°C to 85°C.

Herunterladen

Technische Dokumentation

Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 1
Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt 2.5-V/3.3-V 16-Bit Buffers/Drivers With 3-State Outputs datasheet (Rev. A) 18.09.1998

Bestellen & Qualität