Gehäuseinformationen
| Gehäuse | Pins SOT-23 (DBV) | 5 |
| Betriebstemperaturbereich (°C) -40 to 125 |
| Gehäusemenge | Träger 250 | SMALL T&R |
Merkmale von SN74LVC1G79
- Available in the Texas Instruments NanoFree™ package
- Latch-up performance exceeds 100mA per JESD 78, Class II
- Supports 5V VCC operation
- Inputs accept voltages to 5.5V
- Supports down translation to VCC
- Maximum tpd of 6ns at 3.3V and 50pF load
- Low power consumption, 10µA maximum ICC
- ±24mA output drive at 3.3V
- Ioff supports partial-power-down mode and back-drive protection
Beschreibung von SN74LVC1G79
The SN74LVC1G79 device is a single positive-edge-triggered D-type flip-flop that is designed for 1.65V to 5.5V VCC operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.