SN74AUC1G74

ACTIVO

Biestable único de tipo D con activación de borde positivo con opciones de eliminación y preajuste

Haga su pedido ahora

Hoja de datos

document-pdfAcrobat SN74AUC1G74 datasheet (Rev. D) (Inglés)

SN74AUC1G74

ACTIVO

Hoja de datos

Haga su pedido ahora

Detalles del producto

Number of channels

1

Technology family

AUC

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

275

IOL (max) (mA)

9

IOH (max) (mA)

-9

Supply current (max) (µA)

10

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Operating temperature range (°C)

-40 to 85

Rating

Catalog

Number of channels

1

Technology family

AUC

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

275

IOL (max) (mA)

9

IOH (max) (mA)

-9

Supply current (max) (µA)

10

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Operating temperature range (°C)

-40 to 85

Rating

Catalog

VSSOP (DCU)

8

6.2 mm² (2 mm × 3.1 mm)

DSBGA (YZP)

8

2.8125 mm² (— mm × — mm)

UQFN (RSE)

8

2.25 mm² (1.5 mm × 1.5 mm)

SSOP (DCT)

8

11.8 mm² (2.95 mm × 4 mm)

Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 1.5 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

NanoFree Is a trademark of Texas Instruments

Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 1.5 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

NanoFree Is a trademark of Texas Instruments

This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. To better optimize the flip-flop for higher frequencies, the CLR input overrides the PRE input when they are both low.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. To better optimize the flip-flop for higher frequencies, the CLR input overrides the PRE input when they are both low.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

filter

Buscar otro/a Biestables tipo D

Descargar Ver vídeo con transcripción Video

Productos similares que pueden interesarle

open-in-new

Comparar alternativas

Pin por pin con la misma funcionalidad que el dispositivo comparado

SN74LVC2G74-Q1

ACTIVO

Biestable único de tipo D con activación de borde positivo con opciones de eliminación y preajuste e Voltage range 1.65V to 5.5V, average propagation delay 5.5ns, average drive strength 24mA

SN74AUP2G79

ACTIVO

Biestable doble de tipo D con activación de borde positivo de baja potencia Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74AUP2G32

ACTIVO

Compuerta OR de 2 canales y 2 entradas de 0.8 V a 3.6 V y baja potencia (<1 uA) Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74AUP3G34

ACTIVO

Búferes de baja potencia de 3 canales, 0.8 V a 3.6 V Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74AUP2G00

ACTIVO

Puertas NAND de baja potencia de 2 canales, 2 entradas, de 0.8 V a 3.6 V Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74AUP2G02

ACTIVO

Puertas NOR de baja potencia de 2 canales, 2 entradas, de 0.8 V a 3.6 V Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74LVC1G99-Q1

ACTIVO

Puerta multifunción ultraconfigurable con salidas de 3 estados en catálogo automotriz Voltage range 1.65V to 5.5V, average propagation delay 5.5ns, average drive strength 24mA

SN74AUP3G14

ACTIVO

Inversores de baja potencia, 3 canales, 0.8 V a 3.6 V con entradas de disparador Schmitt Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74AUP2G126

ACTIVO

Búferes de baja potencia de 2 canales, 0.8 V a 3.6 V con salidas de 3 estados Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74AUP2G240

ACTIVO

Inversores de baja potencia de 2 canales, 0.8 V a 3.6 V con salidas de 3 estados Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74AUP2G08

ACTIVO

Puerta AND de 2 canales y 2 entradas, de 0.8 V a 3.6 V, de baja potencia (< 1 uA) Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74LVC2G74

ACTIVO

Biestable único de tipo D con activación de borde positivo con opciones de eliminación y preajuste Voltage range 1.65V to 5.5V, average propagation delay 5.5ns, average drive strength 24mA

SN74AUP2G125

ACTIVO

Búferes de baja potencia de 2 canales, 0.8 V a 3.6 V con salidas de 3 estados Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74AUP2G241

ACTIVO

Búferes de baja potencia de 2 canales, 0.8 V a 3.6 V con salidas de 3 estados Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74AUP3G04

ACTIVO

Inversores de baja potencia de 3 canales, 0.8 V a 3.6 V Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74AUP1G74

ACTIVO

Biestable único de tipo D con activación de borde positivo de baja potencia Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

SN74LVC1G74

ACTIVO

Biestable único de tipo D con activación de borde positivo con opciones de eliminación y preajuste Voltage range 1.65V to 5.5V, average propagation delay 5.5ns, average drive strength 24mA

Documentación técnica

No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.

Ver todo 2

Documentación principal	Tipo	Título	Opciones de formato	Descargar la versión más reciente en inglés	Fecha
*	Hoja de datos	SN74AUC1G74 datasheet (Rev. D)			25/06/2007
	Nota sobre la aplicación	Power-Up Behavior of Clocked Devices (Rev. B)	PDF \| HTML		15/12/2022

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación