TMS320DM365

ACTIVO

Procesador de medios digitales DaVinci

Detalles del producto

Operating system Linux Rating Catalog Operating temperature range (°C) -40 to 85
Operating system Linux Rating Catalog Operating temperature range (°C) -40 to 85
NFBGA (ZCE) 338 169 mm² (13 mm × 13 mm)
  • Highlights
    • High-Performance Digital Media System-on-Chip (DMSoC)
    • Up to 300-MHz ARM926EJ-S Clock Rate
    • Two Video Image Co-processors (HDVICP, MJCP) Engines
    • Supports a Range of Encode, Decode, and Video Quality Operations
    • Video Processing Subsystem
      • HW Face Detect Engine
      • Resize Engine from 1/16x to 8x
      • 16-Bit Parallel AFE (Analog Front-End) Interface Up to 120 MHz
      • 4:2:2 (8-/16-bit) Interface
      • 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
      • 3 DACs for HD Analog Video Output
      • Hardware On-Screen Display (OSD)
    • Capable of 720p 30fps H.264 video processing
      Note: 216-MHz is only capable of D1 processing
    • Peripherals include EMAC, USB 2.0 OTG, DDR2/NAND, 5 SPIs, 2 UARTs, 2 MMC/SD/SDIO, Key Scan
    • 8 Different Boot Modes and Configurable Power-Saving Modes
    • Pin-to-pin and software compatible with DM368
    • Extended temperature (-40°C - 85°C) available for 300-Mhz device
    • 3.3-V and 1.8-V I/O, 1.2-V/1.35-V Core
    • 338-Pin Ball Grid Array at 65nm Process Technology
  • High-Performance Digital Media System-on-Chip (DMSoC)
    • 216-, 270-, 300-MHz ARM926EJ-S Clock Rate
    • Fully Software-Compatible With ARM9™
  • ARM926EJ-S™ Core
    • Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets
    • DSP Instruction Extensions and Single Cycle MAC
    • ARM® Jazelle® Technology
    • EmbeddedICE-RT Logic for Real-Time Debug
  • ARM9 Memory Architecture
    • 16K-Byte Instruction Cache
    • 8K-Byte Data Cache
    • 32K-Byte RAM
    • 16K-Byte ROM
    • Little Endian
  • Two Video Image Co-processors (HDVICP, MJCP) Engines
    • Support a Range of Encode and Decode Operations
    • H.264, MPEG4, MPEG2, MJPEG, JPEG, WMV9/VC1
  • Video Processing Subsystem
    • Front End Provides:
      • HW Face Detect Engine
      • Hardware IPIPE for Real-Time Image Processing
        • Resize Engine
          • Resize Images From 1/16× to 8×
          • Separate Horizontal/Vertical Control
          • Two Simultaneous Output Paths
      • IPIPE Interface (IPIPEIF)
      • Image Sensor Interface (ISIF) and CMOS Imager Interface
      • 16-Bit Parallel AFE (Analog Front End) Interface Up to 120 MHz
      • Glueless Interface to Common Video Decoders
      • BT.601/BT.656/BT.1120 Digital YCbCr 4:2:2 (8-/16-Bit Module
      • Histogram Module
      • Lens distortion correction module (LDC)
      • Hardware 3A statistics collection module (H3A)
    • Back End Provides:
      • Hardware On-Screen Display (OSD)
      • Composite NTSC/PAL video encoder output
      • 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
      • 3 DACs for HD Analog Video Output
      • LCD Controller
      • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
  • Analog-to-Digital Convertor (ADC)
  • Power Management and Real Time Clock Subsystem (PRTCSS)
    • Real Time Clock
  • 16-Bit Host-Port Interface (HPI)
  • 10/100 Mb/s Ethernet Media Access Controller (EMAC) - Digital Media
    • IEEE 802.3 Compliant
    • Supports Media Independent Interface (MII)
    • Management Data I/O (MDIO) Module
  • Key Scan
  • Voice Codec
  • External Memory Interfaces (EMIFs)
    • DDR2 and mDDR SDRAM 16-bit wide EMIF With 256 MByte Address Space (1.8-V I/O)
    • Asynchronous16-/8-bit Wide EMIF (AEMIF)
      • Flash Memory Interfaces
        • NAND (8-/16-bit Wide Data)
        • 16 MB NOR Flash, SRAM
        • OneNAND(16-bit Wide Data)
  • Flash Card Interfaces
    • Two Multimedia Card (MMC) / Secure Digital (SD/SDIO)
    • SmartMedia/xD
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • USB port with Integrated 2.0 High-Speed PHY that Supports
    • USB 2.0 High-Speed Device
    • USB 2.0 High-Speed Host (mini-host, supporting one external device)
    • USB On The Go (HS-USB OTG)
  • Four 64-Bit General-Purpose Timers (each configurable as two 32-bit timers)
  • One 64-Bit Watch Dog Timer
  • Two UARTs (One fast UART with RTS and CTS Flow Control)
  • Five Serial Port Interfaces (SPI) each with two Chip-Selects
  • One Master/Slave Inter-Integrated Circuit (I2C) Bus™
  • One Multi-Channel Buffered Serial Port (McBSP)
    • I2S
    • AC97 Audio Codec Interface
    • S/PDIF via Software
    • Standard Voice Codec Interface (AIC12)
    • SPI Protocol (Master Mode Only)
    • Direct Interface to T1/E1 Framers
    • Time Division Multiplexed Mode (TDM)
    • 128 Channel Mode
  • Four Pulse Width Modulator (PWM) Outputs
  • Four RTO (Real Time Out) Outputs
  • Up to 104 General-Purpose I/O (GPIO) Pins (Multiplexed with Other Device Functions)
  • Boot Modes
    • On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash, MMC/SD, UART, USB, SPI, EMAC, or HPI
    • AEMIF (NOR and OneNAND)
  • Configurable Power-Saving Modes
  • Crystal or External Clock Input (typically 19.2 Mhz, 24 MHz, 27 Mhz or 36 MHz)
  • Flexible PLL Clock Generators
  • Debug Interface Support
    • IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
    • ETB (Embedded Trace Buffer) with 4K-Bytes Trace Buffer memory
    • Device Revision ID Readable by ARM
  • 338-Pin Ball Grid Array (BGA) Package (ZCE Suffix), 0.65-mm Ball Pitch
  • 65nm Process Technology
  • 3.3-V and 1.8-V I/O, 1.2-V/ 1.35-V Internal
  • Community Reesources

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this document.

Windows is a trademark of Microsoft.

All other trademarks are the property of their respective owners.

  • Highlights
    • High-Performance Digital Media System-on-Chip (DMSoC)
    • Up to 300-MHz ARM926EJ-S Clock Rate
    • Two Video Image Co-processors (HDVICP, MJCP) Engines
    • Supports a Range of Encode, Decode, and Video Quality Operations
    • Video Processing Subsystem
      • HW Face Detect Engine
      • Resize Engine from 1/16x to 8x
      • 16-Bit Parallel AFE (Analog Front-End) Interface Up to 120 MHz
      • 4:2:2 (8-/16-bit) Interface
      • 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
      • 3 DACs for HD Analog Video Output
      • Hardware On-Screen Display (OSD)
    • Capable of 720p 30fps H.264 video processing
      Note: 216-MHz is only capable of D1 processing
    • Peripherals include EMAC, USB 2.0 OTG, DDR2/NAND, 5 SPIs, 2 UARTs, 2 MMC/SD/SDIO, Key Scan
    • 8 Different Boot Modes and Configurable Power-Saving Modes
    • Pin-to-pin and software compatible with DM368
    • Extended temperature (-40°C - 85°C) available for 300-Mhz device
    • 3.3-V and 1.8-V I/O, 1.2-V/1.35-V Core
    • 338-Pin Ball Grid Array at 65nm Process Technology
  • High-Performance Digital Media System-on-Chip (DMSoC)
    • 216-, 270-, 300-MHz ARM926EJ-S Clock Rate
    • Fully Software-Compatible With ARM9™
  • ARM926EJ-S™ Core
    • Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets
    • DSP Instruction Extensions and Single Cycle MAC
    • ARM® Jazelle® Technology
    • EmbeddedICE-RT Logic for Real-Time Debug
  • ARM9 Memory Architecture
    • 16K-Byte Instruction Cache
    • 8K-Byte Data Cache
    • 32K-Byte RAM
    • 16K-Byte ROM
    • Little Endian
  • Two Video Image Co-processors (HDVICP, MJCP) Engines
    • Support a Range of Encode and Decode Operations
    • H.264, MPEG4, MPEG2, MJPEG, JPEG, WMV9/VC1
  • Video Processing Subsystem
    • Front End Provides:
      • HW Face Detect Engine
      • Hardware IPIPE for Real-Time Image Processing
        • Resize Engine
          • Resize Images From 1/16× to 8×
          • Separate Horizontal/Vertical Control
          • Two Simultaneous Output Paths
      • IPIPE Interface (IPIPEIF)
      • Image Sensor Interface (ISIF) and CMOS Imager Interface
      • 16-Bit Parallel AFE (Analog Front End) Interface Up to 120 MHz
      • Glueless Interface to Common Video Decoders
      • BT.601/BT.656/BT.1120 Digital YCbCr 4:2:2 (8-/16-Bit Module
      • Histogram Module
      • Lens distortion correction module (LDC)
      • Hardware 3A statistics collection module (H3A)
    • Back End Provides:
      • Hardware On-Screen Display (OSD)
      • Composite NTSC/PAL video encoder output
      • 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
      • 3 DACs for HD Analog Video Output
      • LCD Controller
      • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
  • Analog-to-Digital Convertor (ADC)
  • Power Management and Real Time Clock Subsystem (PRTCSS)
    • Real Time Clock
  • 16-Bit Host-Port Interface (HPI)
  • 10/100 Mb/s Ethernet Media Access Controller (EMAC) - Digital Media
    • IEEE 802.3 Compliant
    • Supports Media Independent Interface (MII)
    • Management Data I/O (MDIO) Module
  • Key Scan
  • Voice Codec
  • External Memory Interfaces (EMIFs)
    • DDR2 and mDDR SDRAM 16-bit wide EMIF With 256 MByte Address Space (1.8-V I/O)
    • Asynchronous16-/8-bit Wide EMIF (AEMIF)
      • Flash Memory Interfaces
        • NAND (8-/16-bit Wide Data)
        • 16 MB NOR Flash, SRAM
        • OneNAND(16-bit Wide Data)
  • Flash Card Interfaces
    • Two Multimedia Card (MMC) / Secure Digital (SD/SDIO)
    • SmartMedia/xD
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • USB port with Integrated 2.0 High-Speed PHY that Supports
    • USB 2.0 High-Speed Device
    • USB 2.0 High-Speed Host (mini-host, supporting one external device)
    • USB On The Go (HS-USB OTG)
  • Four 64-Bit General-Purpose Timers (each configurable as two 32-bit timers)
  • One 64-Bit Watch Dog Timer
  • Two UARTs (One fast UART with RTS and CTS Flow Control)
  • Five Serial Port Interfaces (SPI) each with two Chip-Selects
  • One Master/Slave Inter-Integrated Circuit (I2C) Bus™
  • One Multi-Channel Buffered Serial Port (McBSP)
    • I2S
    • AC97 Audio Codec Interface
    • S/PDIF via Software
    • Standard Voice Codec Interface (AIC12)
    • SPI Protocol (Master Mode Only)
    • Direct Interface to T1/E1 Framers
    • Time Division Multiplexed Mode (TDM)
    • 128 Channel Mode
  • Four Pulse Width Modulator (PWM) Outputs
  • Four RTO (Real Time Out) Outputs
  • Up to 104 General-Purpose I/O (GPIO) Pins (Multiplexed with Other Device Functions)
  • Boot Modes
    • On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash, MMC/SD, UART, USB, SPI, EMAC, or HPI
    • AEMIF (NOR and OneNAND)
  • Configurable Power-Saving Modes
  • Crystal or External Clock Input (typically 19.2 Mhz, 24 MHz, 27 Mhz or 36 MHz)
  • Flexible PLL Clock Generators
  • Debug Interface Support
    • IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
    • ETB (Embedded Trace Buffer) with 4K-Bytes Trace Buffer memory
    • Device Revision ID Readable by ARM
  • 338-Pin Ball Grid Array (BGA) Package (ZCE Suffix), 0.65-mm Ball Pitch
  • 65nm Process Technology
  • 3.3-V and 1.8-V I/O, 1.2-V/ 1.35-V Internal
  • Community Reesources

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this document.

Windows is a trademark of Microsoft.

All other trademarks are the property of their respective owners.

Developers can now deliver pixel-perfect images at up to 720p H.264 at 30fps in their digital video designs without concerns of video format support, constrained network bandwidth, limited system storage capacity or cost with the new TMS320DM365 digital media processor based on DaVinci technology from Texas Instruments Incorporated (TI). With multi-format HD video, the DM365 also features a suite of peripherals saving developers on system costs.

This ARM9-based DM365 device offers speeds up to 300 MHz and supports production-qualified H.264, MPEG-4, MPEG-2, MJPEG and VC1/WMV9 codecs providing customers with the flexibility to select the right video codec for their application. These codecs are driven from video accelerators offloading compression needs from the ARM core so that developers can utilize the most performance from the ARM for their application. Video surveillance designers achieve greater compression efficiency providing more storage without straining the network bandwidth. Developers of media playback and camera-driven applications, such as video doorbells, digital signage, digital video recorders, portable media players and more can ensure interoperability as well as product scalability by taking advantage of the full suite of codecs supported on the DM365.

Along with multi-format HD video, the DM365 enables seamless interface to most additional external devices required for video applications. The image sensor interface is flexible enough to support CCD, CMOS, and various other interfaces such as BT.656, BT1120. The DM365 also offers a high level of integration with HD display support including, 3 built-in 10-bit HD Analog Video Digital to Analog Converters (DACs), DDR2/mDDR, Ethernet MAC, USB 2.0, integrated audio, Host Port Interface (HPI), Analog to Digital Converter, and many more features saving developers on overall system costs as well as real estate on their circuit boards allowing for a slimmer, sleeker design.

Developers can now deliver pixel-perfect images at up to 720p H.264 at 30fps in their digital video designs without concerns of video format support, constrained network bandwidth, limited system storage capacity or cost with the new TMS320DM365 digital media processor based on DaVinci technology from Texas Instruments Incorporated (TI). With multi-format HD video, the DM365 also features a suite of peripherals saving developers on system costs.

This ARM9-based DM365 device offers speeds up to 300 MHz and supports production-qualified H.264, MPEG-4, MPEG-2, MJPEG and VC1/WMV9 codecs providing customers with the flexibility to select the right video codec for their application. These codecs are driven from video accelerators offloading compression needs from the ARM core so that developers can utilize the most performance from the ARM for their application. Video surveillance designers achieve greater compression efficiency providing more storage without straining the network bandwidth. Developers of media playback and camera-driven applications, such as video doorbells, digital signage, digital video recorders, portable media players and more can ensure interoperability as well as product scalability by taking advantage of the full suite of codecs supported on the DM365.

Along with multi-format HD video, the DM365 enables seamless interface to most additional external devices required for video applications. The image sensor interface is flexible enough to support CCD, CMOS, and various other interfaces such as BT.656, BT1120. The DM365 also offers a high level of integration with HD display support including, 3 built-in 10-bit HD Analog Video Digital to Analog Converters (DACs), DDR2/mDDR, Ethernet MAC, USB 2.0, integrated audio, Host Port Interface (HPI), Analog to Digital Converter, and many more features saving developers on overall system costs as well as real estate on their circuit boards allowing for a slimmer, sleeker design.

Descargar Ver vídeo con transcripción Video
Soporte mediante un tercero

Este producto no cuenta con soporte de diseño directo y continuo de TI. Para obtener soporte mientras trabaja en su diseño, puede ponerse en contacto con uno de los siguientes terceros: D3 Engineering, elnfochips, Ittiam Systems, Path Partner Technology o Z3 Technologies.

Documentación técnica

No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 45
Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos TMS320DM365 Digital Media System-on-Chip datasheet (Rev. E) 1/07/2011
* Errata TMS320DM365 Digital Media System-on-Chip Silicon Errata (Silicon Revs 1.1 & 1.2) (Rev. E) 11/07/2011
Nota sobre la aplicación High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 24/02/2023
Guía del usuario SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) 1/06/2020
Guía del usuario TMS320DM36x DaVinci™ Video Processing Front End (VPFE) User's Guide (Rev. C) 30/06/2016
Nota sobre la aplicación Powering the TMS320DM365 using the TPS650061 10/05/2012
Guía del usuario TMS320DM36x DMSoC Power Management and Real-Time Clock Subsystem User's Guide (Rev. B) 3/08/2011
Nota sobre la aplicación Migrating From TMS320DM35x to TMS320DM36x Devices (Rev. A) 2/06/2011
Guía del usuario TMS320DM36x DMSoC General-Purpose Input/Output User's Guide (Rev. C) 19/01/2011
Guía del usuario TMS320DM36x DMSoC Ethernet Media Access Controller (EMAC) User's Guide (Rev. B) 23/12/2010
Guía del usuario TMS320DM36x DMSoC Video Processing Front End User's Guide (Rev. C) 12/11/2010
Guía del usuario TMS320DM36x DMSoC Video Processing Back End User's Guide (Rev. C) 26/08/2010
Guía del usuario TMS320DM36x DMSoC Voice Codec User's Guide (Rev. B) 30/07/2010
Guía del usuario TMS320DM36x DMSoC Face Detection User's Guide (Rev. A) 21/07/2010
Nota sobre la aplicación Application Parameter Settings for TMS320DM365 H.264 Encoder 29/04/2010
Guía del usuario TMS320DM36x DMSoC Multimedia Card/Secure Digital Card Controller User's Guide (Rev. B) 23/04/2010
Guía del usuario TMS320DM36x DMSoC Asynchronous External Memory Interface User's Guide (Rev. C) 23/04/2010
Más documentación TMS320DM3x DaVinci Video Processors 11/04/2010
Nota sobre la aplicación Migrating from TMS320DM365 to TMS320DM368 11/04/2010
Guía del usuario TMS320DM36x DMSoC Serial Peripheral Interface User's Guide (Rev. B) 1/03/2010
Guía del usuario TMS320DM36x DMSoC Key Scan User's Guide (Rev. A) 1/03/2010
Nota sobre la aplicación Smart Codec Features in TMS320DM365 9/12/2009
Nota sobre la aplicación Understanding H.264 Decoder Buffer Mechanism for TMS320DM365 4/12/2009
Nota sobre la aplicación TMS320DM365 Preview of Codec Porting on Linux 4/12/2009
Nota sobre la aplicación Simple Power Solution Using LDOs for the DM365 (Rev. A) 11/09/2009
Nota sobre la aplicación High Integration, High Efficiency Power Solution using DCDC Converters for DM365 (Rev. A) 11/09/2009
Nota sobre la aplicación High-Efficiency Power Solution Using DC/DC Converter for the DM365 (Rev. A) 11/09/2009
Nota sobre la aplicación TMS320DM36x Power Consumption Summary 10/09/2009
Guía del usuario TMS320DM36x DMSoC Universal Host Port Interface User's Guide (Rev. A) 9/08/2009
Guía del usuario TMS320DM36x DMSoC Universal Serial Bus User's Guide (Rev. A) 7/08/2009
Guía del usuario TMS320DM36x DMSoC Inter-Integrated Circuit User's Guide (Rev. A) 7/08/2009
Guía del usuario TMS320DM36x DMSoC ARM Subsystem Reference Guide (Rev. A) 7/08/2009
Guía del usuario TMS320DM36x DMSoC Multichannel Buffered Serial Port User's Guide (Rev. A) 7/08/2009
Nota sobre la aplicación High-Vin, High-Efficiency Power Solution Using DC/DC Converter for the DM365 4/08/2009
Nota sobre la aplicación TMS320DM36x SoC Architecture and Throughput 29/07/2009
Nota sobre la aplicación LSP 2.10 DaVinci Linux Drivers (Rev. A) 8/07/2009
Guía del usuario TMS320DM36x DMSoC Pulse-Width Modulator User's Guide 3/03/2009
Guía del usuario TMS320DM36x DMSoC Real Time Out User's Guide 3/03/2009
Guía del usuario TMS320DM36x DMSoC Universal Asynchronous Receiver/Transmitter User's Guide 3/03/2009
Más documentación Complimentary Analog Devices for DM365 Digital Media Processor 3/03/2009
Guía del usuario TMS320DM36x DMSoC Timer/Watchdog Timer User's Guide 3/03/2009
Guía del usuario TMS320DM36x DMSoC Analog to Digital Converter User's Guide 3/03/2009
Guía del usuario TMS320DM36x DMSoC Enhanced Direct Memory Access Controller User's Guide 3/03/2009
Guía del usuario TMS320DM36x DMSoC DDR2/mDDR Memory Controller User's Guide 3/03/2009
Nota sobre la aplicación Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A) 17/07/2008

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TMDXEVM368 — Módulo de evaluación TMS320DM36x

El módulo de evaluación de video digital (DVEVM) TMS320DM36x permite a los desarrolladores comenzar la evaluación inmediata de los procesadores Digital Media (DMx) de TI y comenzar a crear aplicaciones de video digital como cámaras de seguridad basadas en protocolo de internet (IP), cámaras de (...)

Guía del usuario: PDF
Productos y hardware compatibles
En inventario
Límite:
??asset.out-of-stock-ti_es_MX??
No disponible
Sonda de depuración

TMDSEMU200-U — Sonda de depuración XDS200 USB

El XDS200 es una sonda de depuración (emulador) que se utiliza para depurar dispositivos integrados de TI. Para la mayoría de los dispositivos, se recomienda utilizar el XDS110 (www.ti.com/tool/TMDSEMU110-U), que es más nuevo y de menor costo. El XDS200 es compatible con una amplia variedad de (...)

Productos y hardware compatibles
En inventario
Límite:
??asset.out-of-stock-ti_es_MX??
No disponible
Sonda de depuración

TMDSEMU560V2STM-U — Sonda de depuración USB para rastreo del sistema con el software XDS560™ v2

El XDS560v2 es el modelo de mayor rendimiento de la familia de sondas de depuración XDS560™ y es compatible tanto con el estándar JTAG tradicional (IEEE 1149.1) como con cJTAG (IEEE 1149.7).  Tenga en cuenta que no es compatible con la depuración por cable serie (SWD).

Todas las sondas de (...)

Productos y hardware compatibles
En inventario
Límite:
??asset.out-of-stock-ti_es_MX??
No disponible
Sonda de depuración

TMDSEMU560V2STM-UE — Sonda de depuración USB y ethernet de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Productos y hardware compatibles
En inventario
Límite:
??asset.out-of-stock-ti_es_MX??
No disponible
Sonda de depuración

LB-3P-TRACE32-DSP — Sistema de depuración y seguimiento Lauterbach TRACE32 para procesadores de señales digitales (DSP)

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of single- or multi-core Digital Signal processors (DSPs) which are a popular choice for audio and video processing as well as radar data (...)

Productos y hardware compatibles
Kit de desarrollo de software (SDK)

LINUXDVSDK-DM36X — Kit de desarrollo de software de video digital (DVSDK) Linux para procesadores de medios digitales D

The Linux™ Digital Video Software Development Kits (DVSDKs) enable DaVinci™ system integrators to quickly develop Linux-based multimedia applications that can be easily ported across different devices in the DaVinci platform. Each DVSDK combines a pre-tested set of operating system, application (...)

Productos y hardware compatibles
Códec de software

DM365CODECS — Codecs for DM36x (DM365, DM368) - Software and Documentation

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into audio, video and voice applications. Click GET SOFTWARE button (above) to access the most recent, tested codec versions available. Datasheets and Release Notes (...)

Productos y hardware compatibles
Modelo de simulación

DM365 ZCE BSDL Model

SPRM363.ZIP (9 KB) - Modelo BSDL
Productos y hardware compatibles
Modelo de simulación

DM365 ZCE IBIS Model (Rev. C)

SPRM354B (502 KB) - Modelo IBIS
Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
NFBGA (ZCE) 338 Ultra Librarian

Pedidos y calidad

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene alguna pregunta sobre calidad, encapsulados o pedido de productos de TI, consulte el servicio de asistencia de TI. ​​​​​​​​​​​​​​

Serie de videos

Ver todos los videos

Videos