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UC1875-SP

ACTIVO

Radiation-hardened, QML-V, 20V input, 2A dual-output phase shifted full bridge 2MHz PWM controller

Detalles del producto

Topology Phase-shifted full bridge Control mode Current, Voltage Features Adjustable switching frequency, Error amplifier, Soft start, Sync pin Duty cycle (max) (%) 100
Topology Phase-shifted full bridge Control mode Current, Voltage Features Adjustable switching frequency, Error amplifier, Soft start, Sync pin Duty cycle (max) (%) 100
CFP (W) 24 130.5324 mm² (— mm × — mm) CDIP (J) 20 167.464 mm² (— mm × — mm)
  • QML-V Qualified, SMD 5962-94555
  • Rad-Tolerant: 50 kRad (Si) TID(1)
  • Zero to 100% Duty Cycle Control
  • Programmable Output Turn-On Delay
  • Compatible with Voltage or Current Mode
    Topologies
  • Practical Operation at Switching Frequencies to
    1 MHz
  • Four 2-A Totem Pole Outputs
  • 10-MHz Error Amplifier
  • Undervoltage Lockout (UVLO)
  • Low Startup Current – 150 µA
  • Outputs Active Low During UVLO
  • Soft-Start Control
  • Latched Overcurrent Comparator With Full Cycle
    Restart
  • Trimmed Reference
  • QML-V Qualified, SMD 5962-94555
  • Rad-Tolerant: 50 kRad (Si) TID(1)
  • Zero to 100% Duty Cycle Control
  • Programmable Output Turn-On Delay
  • Compatible with Voltage or Current Mode
    Topologies
  • Practical Operation at Switching Frequencies to
    1 MHz
  • Four 2-A Totem Pole Outputs
  • 10-MHz Error Amplifier
  • Undervoltage Lockout (UVLO)
  • Low Startup Current – 150 µA
  • Outputs Active Low During UVLO
  • Soft-Start Control
  • Latched Overcurrent Comparator With Full Cycle
    Restart
  • Trimmed Reference

The UC1875-SP implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect to the other, allowing constant frequency pulse-width modulation in combination with resonant, zero-voltage switching for high efficiency performance at high frequencies. This circuit may be configured to provide control in either voltage or current mode operation, with a separate overcurrent shutdown for fast fault protection.

A programmable time delay is provided to insert a dead-time at the turn-on of each output stage. This delay, providing time to allow the resonant switching action, is independently controllable for each output pair (A-B, C-D).

With the oscillator capable of operation at frequencies in excess of 2 MHz, overall switching frequencies to 1 MHz are practical. In addition to the standard free running mode, with the CLOCKSYNC pin, the user may configure these devices to accept an external clock synchronization signal, or may lock together up to 5 units with the operational frequency determined by the fastest device.

Protective features include an undervoltage lockout which maintains all outputs in an active-low state until the supply reaches a 10.75-V threshold. 1.5 hysteresis is built in for reliable, boot-strapped chip supply. Overcurrent protection is provided, and will latch the outputs in the OFF state within 70 ns of a fault. The current-fault circuitry implements full-cycle restart operation.

Additional features include an error amplifier with bandwidth in excess of 7 MHz, a 5-V reference, provisions for soft-starting, and flexible ramp generation and slope compensation circuitry.

This device is available in hermetically sealed cerdip, surface mount, and ceramic leadless chip carrier packages for –55°C to 125°C operation.

The UC1875-SP implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect to the other, allowing constant frequency pulse-width modulation in combination with resonant, zero-voltage switching for high efficiency performance at high frequencies. This circuit may be configured to provide control in either voltage or current mode operation, with a separate overcurrent shutdown for fast fault protection.

A programmable time delay is provided to insert a dead-time at the turn-on of each output stage. This delay, providing time to allow the resonant switching action, is independently controllable for each output pair (A-B, C-D).

With the oscillator capable of operation at frequencies in excess of 2 MHz, overall switching frequencies to 1 MHz are practical. In addition to the standard free running mode, with the CLOCKSYNC pin, the user may configure these devices to accept an external clock synchronization signal, or may lock together up to 5 units with the operational frequency determined by the fastest device.

Protective features include an undervoltage lockout which maintains all outputs in an active-low state until the supply reaches a 10.75-V threshold. 1.5 hysteresis is built in for reliable, boot-strapped chip supply. Overcurrent protection is provided, and will latch the outputs in the OFF state within 70 ns of a fault. The current-fault circuitry implements full-cycle restart operation.

Additional features include an error amplifier with bandwidth in excess of 7 MHz, a 5-V reference, provisions for soft-starting, and flexible ramp generation and slope compensation circuitry.

This device is available in hermetically sealed cerdip, surface mount, and ceramic leadless chip carrier packages for –55°C to 125°C operation.

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos UC1875-SP Rad-Tolerant Class-V, Phase Shift Resonant Controller datasheet (Rev. B) PDF | HTML 31/12/2015
* Informe de radiación y confiabilidad UC1875-SP Neutron Displacement Damage (NDD) Characterization Report 29/10/2021
* Informe de radiación y confiabilidad UC1875‐SP TID Report 31/03/2015
* SMD UC1875-SP SMD 5962-94555 8/07/2016
Guía de selección TI Space Products (Rev. L) 27/03/2026
Nota sobre la aplicación Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form (Rev. A) PDF | HTML 5/11/2025
Application brief DLA Approved Optimizations for QML Products (Rev. C) PDF | HTML 17/06/2025
Nota sobre la aplicación Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B) PDF | HTML 10/06/2025
Más documentación TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 20/02/2025
Nota sobre la aplicación QML flow, its importance, and obtaining lot information (Rev. C) 30/08/2023
Nota sobre la aplicación Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19/10/2022
Application brief Controlling Input Power for Present and Next-Generation Power Controllers PDF | HTML 14/12/2020
Nota sobre la aplicación DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 21/08/2020
Libro electrónico Radiation Handbook for Electronics (Rev. A) 21/05/2019
Nota sobre la aplicación Phase Shifted Full Bridge, Zero Voltage Transition Design Considerations (Rev. A) 22/01/2011
Más documentación Seminar 800 Topic 5 - Fixed-Frequency Resonant-Switched PWM 15/02/2001
Más documentación Seminar 900 Topic 3 - Designing a Phase-Shifted ZVT Power Converter 15/02/2001
Más documentación Seminar 900 Topic 4 - 500-W 40-W/in3 Phase-Shifted ZVT Power Converter 15/02/2001

Diseño y desarrollo

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
CFP (W) 24 Ultra Librarian
CDIP (J) 20 Ultra Librarian

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