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データ コンバータ
A/D コンバータ (ADC)
高精度 ADC

ADS1602

アクティブ

16 ビット、2.5MSPS AD コンバータ

ご注文はこちら
データシート

ADS1602

アクティブ
データシート ご注文はこちら

製品詳細

Resolution (Bits) 16 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type Serial Architecture Delta-Sigma Input type Differential Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 4.6 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 530 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.25 SNR (dB) 91 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.25
Resolution (Bits) 16 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type Serial Architecture Delta-Sigma Input type Differential Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 4.6 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 530 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.25 SNR (dB) 91 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.25
TQFP (PFB) 48 81 mm² (9 mm × 9 mm)
  • High Speed:
    • Data Rate: 2.5MSPS
    • Bandwidth: 1.23MHz
  • Outstanding Performance:
    • SNR: 91dB at fIN = 100kHz, –1dBFS
    • THD: –101dB at fIN = 100kHz, –6dBFS
    • SFDR: 103dB at fIN = 100kHz, –6dBFS
  • Ease-of-Use:
    • High-Speed 3-Wire Serial Interface
    • Directly Connects to TMS320 DSPs
    • On-Chip Digital Filter Simplifies Antialias Requirements
    • Simple Pin-Driven Control—No On-Chip Registers to Program
    • Selectable On-Chip Voltage Reference
    • Simultaneous Sampling with Multiple ADS1602s
  • Low Power:
    • 530mW at 2.5MSPS
    • Power-Down Mode
  • High Speed:
    • Data Rate: 2.5MSPS
    • Bandwidth: 1.23MHz
  • Outstanding Performance:
    • SNR: 91dB at fIN = 100kHz, –1dBFS
    • THD: –101dB at fIN = 100kHz, –6dBFS
    • SFDR: 103dB at fIN = 100kHz, –6dBFS
  • Ease-of-Use:
    • High-Speed 3-Wire Serial Interface
    • Directly Connects to TMS320 DSPs
    • On-Chip Digital Filter Simplifies Antialias Requirements
    • Simple Pin-Driven Control—No On-Chip Registers to Program
    • Selectable On-Chip Voltage Reference
    • Simultaneous Sampling with Multiple ADS1602s
  • Low Power:
    • 530mW at 2.5MSPS
    • Power-Down Mode

The ADS1602 is a high-speed, high-precision, delta-sigma (ΔΣ) analog-to-digital converter (ADC) manufactured on an advanced CMOS process. The ADS1602 oversampling topology reduces clock jitter sensitivity during the sampling of high-frequency, large amplitude signals by a factor of four over that achieved by Nyquist-rate ADCs. Consequently, signal-to-noise ratio (SNR) is particularly improved. Total harmonic distortion (THD) is –101dB, and the spurious-free dynamic range (SFDR) is 103dB.

Optimized for power and performance, the ADS1602 dissipates only 530mW while providing a full-scale differential input range of ±3V. Having such a wide input range makes out-of-range signals unlikely. The OTR pin indicates if an analog input out-of-range condition does occur. The differential input signal is measured against the differential reference, which can be generated internally or supplied externally on the ADS1602.

The ADS1602 uses an inherently stable advanced modulator with an on-chip decimation filter. The filter stop band extends to 38.6MHz, which greatly simplifies the antialiasing circuitry. The modulator samples the input signal up to 40MSPS, depending on fCLK, while the 16x decimation filter uses a series of four half-band FIR filter stages to provide 75dB of stop band attenuation and 0.001dB of passband ripple.

Output data is provided over a simple 3-wire serial interface at rates up to 2.5MSPS, with a –3dB bandwidth of 1.23MHz. The output data or its complementary format directly connects to DSPs such as TI’s TMS320 family, FPGAs, or ASICs. A dedicated synchronization pin enables simultaneous sampling with multiple ADS1602s in multi-channel systems. Power dissipation is set by an external resistor that allows a reduction in dissipation when operating at slower speeds. All of the ADS1602 features are controlled by dedicated I/O pins, which simplify operation by eliminating the need for on-chip registers.

The high performing, easy-to-use ADS1602 is especially suitable for demanding measurement applications in sonar, vibration analysis, and data acquisition. The ADS1602 is offered in a small, 7mm × 7mm TQFP-48 package and is specified from –40°C to +85°C.

The ADS1602 is a high-speed, high-precision, delta-sigma (ΔΣ) analog-to-digital converter (ADC) manufactured on an advanced CMOS process. The ADS1602 oversampling topology reduces clock jitter sensitivity during the sampling of high-frequency, large amplitude signals by a factor of four over that achieved by Nyquist-rate ADCs. Consequently, signal-to-noise ratio (SNR) is particularly improved. Total harmonic distortion (THD) is –101dB, and the spurious-free dynamic range (SFDR) is 103dB.

Optimized for power and performance, the ADS1602 dissipates only 530mW while providing a full-scale differential input range of ±3V. Having such a wide input range makes out-of-range signals unlikely. The OTR pin indicates if an analog input out-of-range condition does occur. The differential input signal is measured against the differential reference, which can be generated internally or supplied externally on the ADS1602.

The ADS1602 uses an inherently stable advanced modulator with an on-chip decimation filter. The filter stop band extends to 38.6MHz, which greatly simplifies the antialiasing circuitry. The modulator samples the input signal up to 40MSPS, depending on fCLK, while the 16x decimation filter uses a series of four half-band FIR filter stages to provide 75dB of stop band attenuation and 0.001dB of passband ripple.

Output data is provided over a simple 3-wire serial interface at rates up to 2.5MSPS, with a –3dB bandwidth of 1.23MHz. The output data or its complementary format directly connects to DSPs such as TI’s TMS320 family, FPGAs, or ASICs. A dedicated synchronization pin enables simultaneous sampling with multiple ADS1602s in multi-channel systems. Power dissipation is set by an external resistor that allows a reduction in dissipation when operating at slower speeds. All of the ADS1602 features are controlled by dedicated I/O pins, which simplify operation by eliminating the need for on-chip registers.

The high performing, easy-to-use ADS1602 is especially suitable for demanding measurement applications in sonar, vibration analysis, and data acquisition. The ADS1602 is offered in a small, 7mm × 7mm TQFP-48 package and is specified from –40°C to +85°C.
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技術資料

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上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート 16-Bit, 2.5MSPS Analog-to-Digital Converter データシート (Rev. E) 2011/10/20
アプリケーション・ノート Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 2023/03/29
アプリケーション・ノート ADS16xx Reference Options (Rev. A) PDF | HTML 2022/03/09
e-Book（PDF） Fundamentals of Precision ADC Noise Analysis (Rev. A) 2020/06/19
ホワイト・ペーパー Voltage-reference impact on total harmonic distortion 2016/08/01
e-Book（PDF） Best of Baker's Best: Precision Data Converters -- Delta-Sigma ADCs 2015/03/19

設計と開発

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シミュレーション・モデル

ADS1602 IBIS Model (Rev. A)

SBAC049 (9 KB) - IBIS モデル
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アナログ エンジニア向けカリキュレータは、アナログ回路設計エンジニアが日常的に使用する反復的な計算の多くを迅速化します。この PC ベース ツールはグラフィカル インターフェイスにより、帰還抵抗を使用したオペアンプのゲイン設定から、A/D コンバータ (ADC) のドライブ バッファ回路の安定化に最適な部品の選択に至るまで、一般的に行われている各種計算のリストを表示します。

スタンドアロン ツールとして使用できるほか、『アナログ回路設計式一覧ポケット ガイド』で説明されているコンセプトと組み合わせることもできます。

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ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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TQFP (PFB) 48 Ultra Librarian
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