DAC5652-EP

アクティブ

エンハンスド製品、デュアルチャネル、10 ビット、200MSPS、D/A コンバータ (DAC)

製品詳細

Resolution (Bits) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 200 Features Low Power Rating HiRel Enhanced Product Interpolation 1x Power consumption (typ) (mW) 290 Architecture Current Source Operating temperature range (°C) -55 to 125 Reference type Ext, Int
Resolution (Bits) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 200 Features Low Power Rating HiRel Enhanced Product Interpolation 1x Power consumption (typ) (mW) 290 Architecture Current Source Operating temperature range (°C) -55 to 125 Reference type Ext, Int
TQFP (PFB) 48 81 mm² (9 mm × 9 mm)
  • 10-Bit Dual Transmit Digital-to-Analog Converter (DAC)
  • 200 MSPS Update Rate
  • Single Supply: 3 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 80 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3):
    78 dBc at 15.1 MHz and 16.1 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2 V Reference
  • Low Power: 290 mW
  • Power-Down Mode: 9 mW
  • Package: 48-Pin Thin Quad Flat Pack (TQFP)
  • 10-Bit Dual Transmit Digital-to-Analog Converter (DAC)
  • 200 MSPS Update Rate
  • Single Supply: 3 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 80 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3):
    78 dBc at 15.1 MHz and 16.1 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2 V Reference
  • Low Power: 290 mW
  • Power-Down Mode: 9 mW
  • Package: 48-Pin Thin Quad Flat Pack (TQFP)

The DAC5652 is a monolithic, dual channel, 10-bit, high speed, digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 200 MSPS, the DAC5652 offers exceptional dynamic performance, tight gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high impedance differential current output, suitable for single ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2 V reference voltage. Optionally, an external reference may be used.

The DAC5652 has two 10-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5652 also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5652 has been specifically designed for a differential transformer coupled output with a 50 Ω doubly terminated load. For a 20 mA full scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm output power) are supported.

The DAC5652 is available in a 48-pin thin quad flat pack (TQFP). Pin compatibility between family members provides 10-bit (DAC5652), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. Furthermore, the DAC5652 is pin compatible to the DAC2900 and AD9763 dual DACs. The device is characterized for operation over the military temperature range of –55°C to 125°C.

The DAC5652 is a monolithic, dual channel, 10-bit, high speed, digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 200 MSPS, the DAC5652 offers exceptional dynamic performance, tight gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high impedance differential current output, suitable for single ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2 V reference voltage. Optionally, an external reference may be used.

The DAC5652 has two 10-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5652 also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5652 has been specifically designed for a differential transformer coupled output with a 50 Ω doubly terminated load. For a 20 mA full scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm output power) are supported.

The DAC5652 is available in a 48-pin thin quad flat pack (TQFP). Pin compatibility between family members provides 10-bit (DAC5652), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. Furthermore, the DAC5652 is pin compatible to the DAC2900 and AD9763 dual DACs. The device is characterized for operation over the military temperature range of –55°C to 125°C.

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上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート DAC5652-EP データシート (Rev. C) 2013/04/24
* VID DAC5652-EP VID V6206638 2016/06/21
アプリケーション・ノート High Speed, Digital-to-Analog Converters Basics (Rev. A) 2012/10/23

設計と開発

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パッケージ ピン数 CAD シンボル、フットプリント、および 3D モデル
TQFP (PFB) 48 Ultra Librarian

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