DAC900
- SINGLE +5V OR +3V OPERATION
- HIGH SFDR: 5MHz Output at 100MSPS: 68dBc
- LOW GLITCH: 3pV-s
- LOW POWER: 170mW at +5V
- INTERNAL REFERENCE:
Optional Ext. Reference
Adjustable Full-Scale Range
Multiplying Option - APPLICATIONS
- COMMUNICATION TRANSMIT CHANNELS
WLL, Cellular Base Station
Digital Microwave Links
Cable Modems - WAVEFORM GENERATION
Direct Digital Synthesis (DDS)
Arbitrary Waveform Generation (ARB) - MEDICAL/ULTRASOUND
- HIGH-SPEED INSTRUMENTATION AND CONTROL
- VIDEO, DIGITAL TV
- COMMUNICATION TRANSMIT CHANNELS
The DAC900 is a high-speed, Digital-to-Analog Converter (DAC) offering a 10-bit resolution option within the SpeedPlus family of high-performance converters. Featuring pin compatibility among family members, the DAC908, DAC902, and DAC904 provide a component selection option to an 8-, 12-, and 14-bit resolution, respectively. All models within this family of DACs support update rates in excess of 165MSPS with excellent dynamic performance,and are especially suited to fulfill the demands of a variety of applications.
The advanced segmentation architecture of the DAC900 is optimized to provide a high Spurious-Free Dynamic Range (SFDR) for single-tone, as well as for multi-tone signals—essential when used for the transmit signal path of communication systems.
The DAC900 has a high impedance (200k
) current output with a nominal range of 20mA and an output compliance of up to 1.25V. The differential outputs allow for both a differential or single-ended analog signal interface. The close matching of the current outputs ensures superior dynamic performance in the differential configuration, which can be implemented with a transformer.
Utilizing a small geometry CMOS process, the monolithic DAC900 can be operated on a wide, single-supply range of +2.7V to +5.5V. Its low power consumption allows for use in portable and battery-operated systems. Further optimization can be realized by lowering the output current with the adjustable full-scale option.
For noncontinuous operation of the DAC900, a power-down mode results in only 45mW of standby power.
The DAC900 comes with an integrated 1.24V bandgap reference and edge-triggered input latches, offering a complete converter solution. Both +3V and +5V CMOS logic families can be interfaced to the DAC900.
The reference structure of the DAC900 allows for additional flexibility by utilizing the on-chip reference, or applying an external reference. The full-scale output current can be adjusted over a span of 2mA to 20mA, with one external resistor, while maintaining the specified dynamic performance.
The DAC900 is available in SO-28 and TSSOP-28 packages.
技術資料
| 上位の文書 | タイプ | タイトル | フォーマットオプション | 最新の英語版をダウンロード | 日付 | |
|---|---|---|---|---|---|---|
| * | データシート | DAC900 10-Bit 165-MSPS Digital-to-Analog Converter データシート (Rev. B) | 2002/05/29 | |||
| アプリケーション・ノート | Wideband Complementary Current Output DAC Single-Ended Interface (Rev. A) | 2015/05/08 | ||||
| アプリケーション・ノート | High Speed, Digital-to-Analog Converters Basics (Rev. A) | 2012/10/23 | ||||
| ユーザー・ガイド | DEM-DAC90x: Evaluation Fixture for the DAC900, DAC902, DAC904, DAC908 | 2000/09/27 |
設計と開発
その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。
MATCHGAIN-CALC — Wideband Comp Current Output DAC to SE Interface: Impr Matching for Gain ; Compliance Volt Swing
NOTE: Calculator software is available when downloading the application note.
- Click on "abstract" to view abstract of document.
- Open the ZIP file to extract the calculator tool.
- Open the PDF file to view the application note.
High-speed digital-to-analog converters (DACs) most often use a (...)
| パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
|---|---|---|
| TSSOP (PW) | 28 | Ultra Librarian |
| SOIC (DW) | 28 | Ultra Librarian |
購入と品質
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