SN74ALVCH16863
- Member of the Texas Instruments WidebusTM Family
- EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
This 18-bit bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16863 is an 18-bit noninverting transceiver designed for synchronous communication between data buses. The control-function implementation minimizes external timing requirements.
The SN74ALVCH16863 can be used as two 9-bit transceivers or one 18-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the output-enable (OEAB\ or OEBA\) inputs.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16863 is characterized for operation from -40°C to 85°C.
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技術資料
| 上位の文書 | タイプ | タイトル | フォーマットオプション | 最新の英語版をダウンロード | 日付 | |
|---|---|---|---|---|---|---|
| * | データシート | 18-Bit Transceiver With 3-State Outputs データシート (Rev. B) | 1999/02/11 | |||
| アプリケーション・ノート | An Overview of Bus-Hold Circuit and the Applications (Rev. B) | 2018/09/17 |
設計と開発
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| パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
|---|---|---|
| TSSOP (DGG) | 56 | Ultra Librarian |