TPS65084

アクティブ

Braswell プロセッサ向け、プログラマブル中入力電圧範囲の電源 IC(PMIC)

製品詳細

Regulated outputs (#) 13 Vin (Min) (V) 5.6 Vin (Max) (V) 21 Iout (Max) (A) 11 Rating Catalog LDO 4 Iq (Typ) (mA) 0.3 Features Comm Control, Dynamic Voltage Scaling, Enable, Enable Pin, I2C Control, Over Current Protection, Power Good, Power Sequencing, Synchronous Rectification, Thermal Shutdown, UVLO Fixed Processor name Braswell Processor supplier Intel/Altera Shutdown current (ISD) (Typ) (uA) 65 Switching frequency (Typ) (kHz) 2500 Configurability Factory programmable, Software configurable
Regulated outputs (#) 13 Vin (Min) (V) 5.6 Vin (Max) (V) 21 Iout (Max) (A) 11 Rating Catalog LDO 4 Iq (Typ) (mA) 0.3 Features Comm Control, Dynamic Voltage Scaling, Enable, Enable Pin, I2C Control, Over Current Protection, Power Good, Power Sequencing, Synchronous Rectification, Thermal Shutdown, UVLO Fixed Processor name Braswell Processor supplier Intel/Altera Shutdown current (ISD) (Typ) (uA) 65 Switching frequency (Typ) (kHz) 2500 Configurability Factory programmable, Software configurable
  • Three Variable-Output Voltage Step-Down
    Controllers
    • Wide VIN Range From 5.4 V to 21 V
    • Up to 7-A Output Current for BUCK1 (VCC) and
      BUCK6 (VDDQ), and 11-A for BUCK2 (VGG)
      Using External FETs
    • I2C DVS Control (0.5 V to 1.45 V in 10-mV
      Steps) for BUCK1 and BUCK2
    • Pin-Selectable Output Voltages (1.2 V or
      1.35 V) for BUCK6 (VDDQ)
  • Three Variable-Output Voltage Synchronous Step-
    Down Converters
    • VIN Range From 4.5 V to 5.5 V
    • Up to 3.5 A of Output Current for BUCK3 (VNN)
      With I2C DVS Control (0.65 V to
      1.45 V in 25-mV Steps)
    • Up to 3 A of Output Current for BUCK4
      (V1P05A) and up to 1.5 A of Output Current for
      BUCK5 (V1P8A)
  • Three LDO Regulators With Adjustable Output
    Voltage
    • LDOA1: I2C-Selectable Output Voltage From
      1.35 V to 3.3 V for up to 200 mA of Output Current
    • LDOA2: I2C-Selectable Output Voltage From
      1.05 V, 1.1 V, 1.15 V, and 1.2 V
    • LDOA3: I2C-Selectable Output Voltage From
      1.1 V, 1.15 V, 1.2 V, and 1.24 V
  • VTT LDO for DDR3 and DDR4 Memory
    Termination
  • Three Load Switches With Slew Rate Control
    • Up to 300 mA of Output Current With Voltage
      Drop Less Than 1.5% of Nominal Input Voltage
    • RDSON < 96 mΩ at Input Voltage of 1.8 V
  • I2C Interface (Device Address 0x5E) Supports
    Standard Mode (100 kHz), Fast Mode (400 kHz),
    and Fast Mode Plus (1 MHz)
  • 64-Pin, Single-Row, 0.4-mm Pitch QFN Package
  • Three Variable-Output Voltage Step-Down
    Controllers
    • Wide VIN Range From 5.4 V to 21 V
    • Up to 7-A Output Current for BUCK1 (VCC) and
      BUCK6 (VDDQ), and 11-A for BUCK2 (VGG)
      Using External FETs
    • I2C DVS Control (0.5 V to 1.45 V in 10-mV
      Steps) for BUCK1 and BUCK2
    • Pin-Selectable Output Voltages (1.2 V or
      1.35 V) for BUCK6 (VDDQ)
  • Three Variable-Output Voltage Synchronous Step-
    Down Converters
    • VIN Range From 4.5 V to 5.5 V
    • Up to 3.5 A of Output Current for BUCK3 (VNN)
      With I2C DVS Control (0.65 V to
      1.45 V in 25-mV Steps)
    • Up to 3 A of Output Current for BUCK4
      (V1P05A) and up to 1.5 A of Output Current for
      BUCK5 (V1P8A)
  • Three LDO Regulators With Adjustable Output
    Voltage
    • LDOA1: I2C-Selectable Output Voltage From
      1.35 V to 3.3 V for up to 200 mA of Output Current
    • LDOA2: I2C-Selectable Output Voltage From
      1.05 V, 1.1 V, 1.15 V, and 1.2 V
    • LDOA3: I2C-Selectable Output Voltage From
      1.1 V, 1.15 V, 1.2 V, and 1.24 V
  • VTT LDO for DDR3 and DDR4 Memory
    Termination
  • Three Load Switches With Slew Rate Control
    • Up to 300 mA of Output Current With Voltage
      Drop Less Than 1.5% of Nominal Input Voltage
    • RDSON < 96 mΩ at Input Voltage of 1.8 V
  • I2C Interface (Device Address 0x5E) Supports
    Standard Mode (100 kHz), Fast Mode (400 kHz),
    and Fast Mode Plus (1 MHz)
  • 64-Pin, Single-Row, 0.4-mm Pitch QFN Package

The TPS650842 device is a single-chip solution, power-management IC designed specifically for the latest Intel™ processors targeted for tablets, ultrabooks, and notebooks with NVDC or non-NVDC power architectures, using 2S, 3S, or 4S Li-Ion battery packs. The TPS650842 device is used for essential systems with low-voltage rails merged for the smallest footprint and lowest-cost system-power solution. The TPS650842 device provides the complete power solution based on the Intel Reference Designs. Six highly efficient step-down voltage regulators (VRs), a sink or source LDO (VTT), two LDOs, and three load switches are controlled by power-up sequence logic to provide the proper power rails, sequencing, and protection—including DDR3 and DDR4 memory power. The three regulators (BUCK1–BUCK3) support dynamic voltage scaling (DVS) for maximum efficiency—including support for Connected Standby. The high-frequency VRs use small inductors and capacitors to achieve a small solution size. An I2C interface allows simple control by an embedded controller (EC) or by a system on chip (SoC). The PMIC comes in an 8-mm × 8-mm single-row QFN package with a thermal pad for good thermal dissipation and ease of board routing.

Use the following email address to request the full version of this data sheet: ipgmkt@list.ti.com.

The TPS650842 device is a single-chip solution, power-management IC designed specifically for the latest Intel™ processors targeted for tablets, ultrabooks, and notebooks with NVDC or non-NVDC power architectures, using 2S, 3S, or 4S Li-Ion battery packs. The TPS650842 device is used for essential systems with low-voltage rails merged for the smallest footprint and lowest-cost system-power solution. The TPS650842 device provides the complete power solution based on the Intel Reference Designs. Six highly efficient step-down voltage regulators (VRs), a sink or source LDO (VTT), two LDOs, and three load switches are controlled by power-up sequence logic to provide the proper power rails, sequencing, and protection—including DDR3 and DDR4 memory power. The three regulators (BUCK1–BUCK3) support dynamic voltage scaling (DVS) for maximum efficiency—including support for Connected Standby. The high-frequency VRs use small inductors and capacitors to achieve a small solution size. An I2C interface allows simple control by an embedded controller (EC) or by a system on chip (SoC). The PMIC comes in an 8-mm × 8-mm single-row QFN package with a thermal pad for good thermal dissipation and ease of board routing.

Use the following email address to request the full version of this data sheet: ipgmkt@list.ti.com.

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More information and sample availability

Full data sheet and other information are available. Request now

[RSK] package is available for sample (TPS650842A0RSKT). Request now

技術資料

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種類 タイトル 最新の英語版をダウンロード 日付
* データシート TPS650842 PMIC for Intel™ Braswell Platform データシート PDF | HTML 2015年 9月 1日
ユーザー・ガイド Etna Design Guide 2015年 8月 29日
アプリケーション・ノート TPS650842 Checklist 2015年 8月 26日

設計および開発

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評価基板 (EVM) 向けの GUI

IPG-UI — IPG-UI EVM GUI

The IPG-UI GUI can be used to configure multiple PMIC devices to evaluate the features and performance of those devices.  This GUI is build using web based technologies and supports interacting with the EVM hardware using a USB2ANY adapter board. The USB2ANY Explorer is provided to allow (...)
パッケージ ピン数 ダウンロード
VQFN (RSK) 64 オプションの表示

購入と品質

記載されている情報:
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL rating / リフローピーク温度
  • MTBF/FIT 推定値
  • 原材料組成
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果

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