74ACT16841

Name: 74ACT16841
Brand: TI
SKU: 74ACT16841
Price: 6.918 USD

활성

3상 출력을 지원하는 20비트 버스 인터페이스 D형 래치

지금 주문

데이터 시트

document-pdfAcrobat 20-Bit Bus Interface D-Type Latches With 3-State Outputs datasheet (Rev. A) (영어)

74ACT16841

활성

데이터 시트

지금 주문

제품 상세 정보

Number of channels

20

Technology family

ACT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

TTL-Compatible CMOS

Output type

3-State

Clock frequency (max) (MHz)

90

IOL (max) (mA)

24

IOH (max) (mA)

-24

Supply current (max) (µA)

80

Features

Balanced outputs, Flow-through pinout, High speed (tpd 10-50ns), Positive input clamp diode

Operating temperature range (°C)

-40 to 85

Rating

Catalog

Number of channels

20

Technology family

ACT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

TTL-Compatible CMOS

Output type

3-State

Clock frequency (max) (MHz)

90

IOL (max) (mA)

24

IOH (max) (mA)

-24

Supply current (max) (µA)

80

Features

Balanced outputs, Flow-through pinout, High speed (tpd 10-50ns), Positive input clamp diode

Operating temperature range (°C)

-40 to 85

Rating

Catalog

SSOP (DL)

56

190.647 mm² 18.42 x 10.35

Members of the Texas Instruments Widebus^TM Family
Inputs Are TTL-Voltage Compatible
3-State Outputs Drive Bus Lines Directly
Provide Extra Bus Driving/Latches Necessary for Wider Address/Data Paths or Buses With Parity
Flow-Through Architecture Optimizes PCB Layout
Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Thin Shrink Small-Outline (DGG) Packages, 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings, and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

Members of the Texas Instruments Widebus^TM Family
Inputs Are TTL-Voltage Compatible
3-State Outputs Drive Bus Lines Directly
Provide Extra Bus Driving/Latches Necessary for Wider Address/Data Paths or Buses With Parity
Flow-Through Architecture Optimizes PCB Layout
Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Thin Shrink Small-Outline (DGG) Packages, 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings, and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

These 20-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The 'ACT16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

A buffered output-enable (1 or 2) input can be used to place the outputs of the corresponding 10-bit latch in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.

does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The 74ACT16841 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 54ACT16841 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16841 is characterized for operation from -40°C to 85°C.

These 20-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The 'ACT16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

A buffered output-enable (1 or 2) input can be used to place the outputs of the corresponding 10-bit latch in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.

does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The 74ACT16841 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 54ACT16841 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16841 is characterized for operation from -40°C to 85°C.

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