제품 상세 정보

Sample rate (max) (Msps) 3000 Resolution (Bits) 8 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 3000 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.82 Power consumption (typ) (mW) 1900 Architecture Folding Interpolating SNR (dB) 45.4 ENOB (Bits) 7.2 SFDR (dB) 57 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 3000 Resolution (Bits) 8 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 3000 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.82 Power consumption (typ) (mW) 1900 Architecture Folding Interpolating SNR (dB) 45.4 ENOB (Bits) 7.2 SFDR (dB) 57 Operating temperature range (°C) -40 to 85 Input buffer Yes
HLQFP (NNB) 128 484 mm² (22 mm × 22 mm)

  • Single +1.9V ±0.1V Operation
  • Choice of SDR or DDR output clocking
  • Serial Interface for Extended Control
  • Adjustment of Input Full-Scale Range and Offset
  • Duty Cycle Corrected Sample Clock
  • Test pattern

  • Key Specifications

    Resolution

    8 Bits

    Max Conversion Rate

    3 GSPS (min)

    Error Rate

    10 -18 (typ)

    ENOB @ 748 MHz Input

    7.0 Bits (typ)

    SNR @ 748 MHz

    44.5 dB (typ)

    Full Power Bandwidth

    3 GHz (typ)

  • Power Consumption
  • Operating

    1.9 W (typ)

    Power Down Mode

    25 mW (typ)


  • Single +1.9V ±0.1V Operation
  • Choice of SDR or DDR output clocking
  • Serial Interface for Extended Control
  • Adjustment of Input Full-Scale Range and Offset
  • Duty Cycle Corrected Sample Clock
  • Test pattern

  • Key Specifications

    Resolution

    8 Bits

    Max Conversion Rate

    3 GSPS (min)

    Error Rate

    10 -18 (typ)

    ENOB @ 748 MHz Input

    7.0 Bits (typ)

    SNR @ 748 MHz

    44.5 dB (typ)

    Full Power Bandwidth

    3 GHz (typ)

  • Power Consumption
  • Operating

    1.9 W (typ)

    Power Down Mode

    25 mW (typ)


    The ADC083000 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 3.4 GSPS. Consuming a typical 1.9 Watts at 3 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable an excellent response of all dynamic parameters up to Nyquist, producing a high 7.0 Effective Number Of Bits, (ENOB) with a 748 MHz input signal and a 3 GHz sample rate while providing a 10 -18 Word Error Rate. The ADC083000 achieves a 3 GSPS sampling rate by utilizing both the rising and falling edge of a 1.5 GHz input clock. Output formatting is offset binary and the LVDS digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.15V.

    The ADC has a 1:4 demultiplexer that feeds four LVDS buses and reduces the output data rate on each bus to a quarter of the sampling rate.

    The converter typically consumes less than 25 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the Industrial (-40°C TA +85°C) temperature range.


    The ADC083000 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 3.4 GSPS. Consuming a typical 1.9 Watts at 3 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable an excellent response of all dynamic parameters up to Nyquist, producing a high 7.0 Effective Number Of Bits, (ENOB) with a 748 MHz input signal and a 3 GHz sample rate while providing a 10 -18 Word Error Rate. The ADC083000 achieves a 3 GSPS sampling rate by utilizing both the rising and falling edge of a 1.5 GHz input clock. Output formatting is offset binary and the LVDS digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.15V.

    The ADC has a 1:4 demultiplexer that feeds four LVDS buses and reduces the output data rate on each bus to a quarter of the sampling rate.

    The converter typically consumes less than 25 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the Industrial (-40°C TA +85°C) temperature range.


    다운로드 스크립트와 함께 비디오 보기 비디오

    관심 가지실만한 유사 제품

    open-in-new 대안 비교
    비교 대상 장치와 유사한 기능.
    ADC08B3000 활성 4K 버퍼를 갖춘 8비트, 3.0GSPS 아날로그-디지털 컨버터(ADC) Same speed and resolution, with internal 4-k data buffer

    기술 자료

    검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
    4개 모두 보기
    상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
    * 데이터 시트 ADC083000 8-Bit, 3 GSPS, High Performance, Low Power A/D Converter datasheet (Rev. N) 2009. 7. 6
    기술 문서 RF sampling: aliasing can be your friend PDF | HTML 2015. 7. 22
    사용 설명서 Single low power, ultra high speed CMOS A/D Converter User Guide 2012. 1. 27
    애플리케이션 노트 Selecting Amplifiers, ADCs, and Clocks for High-Performance Signal Paths 2007. 9. 13

    설계 및 개발

    추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

    시뮬레이션 모델

    ADC083000 IBIS Model

    SNAM005.ZIP (9 KB) - IBIS 모델
    지원되는 제품 및 하드웨어
    패키지 CAD 기호, 풋프린트 및 3D 모델
    HLQFP (NNB) 128 Ultra Librarian

    주문 및 품질

    지원 및 교육

    TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

    콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

    품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

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