제품 상세 정보

Sample rate (max) (Msps) 3000 Resolution (Bits) 8 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 3000 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.81 Power consumption (typ) (mW) 1600 Architecture Folding Interpolating SNR (dB) 45.3 ENOB (Bits) 7.2 SFDR (dB) 55.4 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 3000 Resolution (Bits) 8 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 3000 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.81 Power consumption (typ) (mW) 1600 Architecture Folding Interpolating SNR (dB) 45.3 ENOB (Bits) 7.2 SFDR (dB) 55.4 Operating temperature range (°C) -40 to 85 Input buffer Yes
HLQFP (NNB) 128 484 mm² 22 x 22
  • Single +1.9V ±0.1V Operation
  • Choice of SDR or DDR Output Clocking
  • Internal selectable 4K Data Buffer
  • Serial Interface for Extended Control
  • Adjustment of Input Full-Scale Range, Offset and Clock Phase
  • Duty Cycle Corrected Sample Clock
  • Test Pattern Output Capability

Key Specifications

  • Resolution: 8 Bits
  • Max Conversion Rate: 3 Gsps (min)
  • Code Error Rate: 10-18 (typ)
  • ENOB @ 748 MHz Input: 7.1 Bits (typ)
  • SNR @ 748 MHz: 44.9 dB (typ)
  • Full Power Bandwidth: 3 GHz (typ)
  • Power Consumption
    • Full Power Capure: 1.6 W (typ)
    • Power Down Mode: 25 mW (typ)

All trademarks are the property of their respective owners.

  • Single +1.9V ±0.1V Operation
  • Choice of SDR or DDR Output Clocking
  • Internal selectable 4K Data Buffer
  • Serial Interface for Extended Control
  • Adjustment of Input Full-Scale Range, Offset and Clock Phase
  • Duty Cycle Corrected Sample Clock
  • Test Pattern Output Capability

Key Specifications

  • Resolution: 8 Bits
  • Max Conversion Rate: 3 Gsps (min)
  • Code Error Rate: 10-18 (typ)
  • ENOB @ 748 MHz Input: 7.1 Bits (typ)
  • SNR @ 748 MHz: 44.9 dB (typ)
  • Full Power Bandwidth: 3 GHz (typ)
  • Power Consumption
    • Full Power Capure: 1.6 W (typ)
    • Power Down Mode: 25 mW (typ)

All trademarks are the property of their respective owners.

The ADC08B3000 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sample rates up to 3.4 Gigasamples Per Second, (Gsps). Consuming a typical 1.6 Watts at 3 Gsps from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration scheme enable an excellent response of all dynamic parameters up to Nyquist, producing a high 7.1 Effective Number Of Bits, (ENOB), with a 748 MHz input signal and a 3 GHz sample rate while providing a 10-18 Code Error Rate. A sample rate of 3 Gsps is achieved by interleaving two ADCs, each operating at 1.5 Gsps. Output formatting is offset binary. The device contains a 4K Capture Buffer with output on two 8-bit Low Voltage CMOS (LVCMOS) output buses at rates up to 200MHz.

The converter typically consumes less than 25 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad HLQFP and operates over the Industrial (-40°C ≤ TA ≤ +85°C) temperature range.

The ADC08B3000 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sample rates up to 3.4 Gigasamples Per Second, (Gsps). Consuming a typical 1.6 Watts at 3 Gsps from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration scheme enable an excellent response of all dynamic parameters up to Nyquist, producing a high 7.1 Effective Number Of Bits, (ENOB), with a 748 MHz input signal and a 3 GHz sample rate while providing a 10-18 Code Error Rate. A sample rate of 3 Gsps is achieved by interleaving two ADCs, each operating at 1.5 Gsps. Output formatting is offset binary. The device contains a 4K Capture Buffer with output on two 8-bit Low Voltage CMOS (LVCMOS) output buses at rates up to 200MHz.

The converter typically consumes less than 25 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad HLQFP and operates over the Industrial (-40°C ≤ TA ≤ +85°C) temperature range.

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비교 대상 장치와 유사한 기능
ADC083000 활성 8비트, 3.0GSPS 아날로그-디지털 컨버터(ADC) Same speed and resolution, without 4-k internal data buffer

기술 자료

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유형 직함 날짜
* Data sheet ADC08B3000 8-Bit, 3 GSPS, High Perf Low Pwr ADC w/4K Buffer datasheet (Rev. M) 2013/04/18
User guide Single low power, ultra high speed CMOS A D Converter with data buffer 2012/01/25

설계 및 개발

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시뮬레이션 툴

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TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
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HLQFP (NNB) 128 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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