ADC12D1600RF
- Excellent Noise and Linearity up to and Above fIN =
2.7 GHz - Configurable to Either 3.2 or 2 GSPS Interleaved
or 1600 or 1000 MSPS Dual ADC - New DESCLKIQ Mode for High Bandwidth, High
Sampling Rate Apps - Pin-Compatible With ADC10D1x00, ADC12D1x00
- AutoSync Feature for Multi-Chip Synchronization
- Internally Terminated, Buffered, Differential Analog
Inputs - Interleaved Timing Automatic and Manual Skew
Adjust - Test Patterns at Output for System Debug
- Time Stamp Feature to Capture External Trigger
- Programmable Gain, Offset, and tAD Adjust
Feature - 1:1 Non-Demuxed or 1:2 Demuxed LVDS Outputs
- Key Specifications
- Resolution 12 Bits
- Interleaved 3.2- and 2-GSPS ADC
- IMD3 (Fin = 2.7 GHz at –13 dBFS) –63.7/–73
dBFS (Typical) - IMD3 (Fin = 2.7 GHz at –16 dBFS) –66.7/–85
dBFS (Typical) - Noise Floor –154.6/–154 dBm/Hz (Typical)
- Power 3.94/3.42 W (Typical)
- IMD3 (Fin = 2.7 GHz at –13 dBFS) –63.7/–73
- Dual 1600/1000 MSPS ADC, Fin = 498 MHz
- ENOB 9.2/9.4 Bits (Typical)
- SNR 58.2/58.8 dB (Typical)
- SFDR 66.7/71.9 dBc (Typical)
- Power per Channel 1.97/1.71 W (Typical)
The 12-bit 3.2- and 2-GSPS ADC12D1x00RF is an RF-sampling GSPS ADC that can directly sample input frequencies up to and above 2.7 GHz. The ADC12D1x00RF augments the very large Nyquist zone of TI’s GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable range beyond the 3rd Nyquist zone
The ADC12D1x00RF provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common-mode voltage. The product is packaged in a lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to 85°C.
기술 자료
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
ADC-LD-BB — ADC 저왜곡 발룬 보드
ADC-LD-BB 보드 1개가 GSPS ADC(아날로그-디지털 컨버터) 레퍼런스 보드가 포함된 하드웨어 키트에 포함되어 있습니다. ADC1xDxx00RB의 아날로그 입력은 차동 방식이고 대부분의 신호 소스는 싱글 엔드 방식이므로, 이러한 발룬 보드는 일반적으로 싱글 엔드-투-차동 변환을 구현하는 데 사용됩니다. I 및 Q 입력이 동시에 유사한 신호로 구동되는 경우, 동일한 유형의 추가 발룬 보드가 필요할 수 있습니다.
참고로, 이 발룬 보드는 차동-투-싱글 엔드 변환을 수행하는 데에도 사용할 수 있습니다. 예를 들어, GSPS (...)
WAVEVISION5 — WaveVision 5 Software
WaveVision 5 software is part of the WaveVision evaluation system that also includes WaveVision 5 Data Capture Board. The WaveVision 5 system is an easy-to-use data acquisition and analysis tool, designed to help users evaluate Texas Instruments' Signal Path solutions.
While WaveVision 5 software (...)
TIDA-00071 — GSPS(초당 기가 샘플) ADC에 대한 권장 회로도 및 레이아웃
This reference design is a guide to the schematics and layout for the system designer using a GSPS ADC in their system. Use this reference design along with the datasheet — the datasheet is always the final authority. Also, the ADC1xDxxxx(RF)RB Reference Board provides a useful reference (...)
TIDA-00113 — 고대역폭 애플리케이션에서 싱글 채널 또는 듀얼 채널 모드로 GSPS ADC 구동
This design is intended to help the system designer in understanding tradeoffs and optimizing implementation for driving the Giga-Sample-Per-Second ADC with balun configurations for wideband applications. The tradeoffs considered include balun construction, insertion loss, dynamic (...)
TIDA-00479 — GSPS ADC를 위한 최적의 클록 소스 레퍼런스 디자인
The ADC12D1600RFRB reference design provides a platform to demonstrate a high speed digitizer application which incorporates clocking, power management, and signal processing. The reference design utilizes the 1.6 GSPS ADC12D1600RF device, onboard FPGA Xilinx Virtex 4, and high performance clock (...)
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| PBGA (NXA) | 292 | Ultra Librarian |
주문 및 품질
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.