CD40175B

Name: CD40175B
Brand: TI
SKU: CD40175B
Price: 0.322 USD

활성

CMOS 쿼드 D형 플립플롭

지금 주문

데이터 시트

document-pdfAcrobat CD40175B TYPES datasheet (Rev. C) (영어)

CD40175B

활성

데이터 시트

지금 주문

제품 상세 정보

Number of channels

4

Technology family

CD4000

Supply voltage (min) (V)

3

Supply voltage (max) (V)

18

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

14

IOL (max) (mA)

6.8

IOH (max) (mA)

-6.8

Supply current (max) (µA)

600

Features

Balanced outputs, Positive input clamp diode, Standard speed (tpd > 50ns)

Operating temperature range (°C)

-55 to 125

Rating

Catalog

Number of channels

4

Technology family

CD4000

Supply voltage (min) (V)

3

Supply voltage (max) (V)

18

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

14

IOL (max) (mA)

6.8

IOH (max) (mA)

-6.8

Supply current (max) (µA)

600

Features

Balanced outputs, Positive input clamp diode, Standard speed (tpd > 50ns)

Operating temperature range (°C)

-55 to 125

Rating

Catalog

PDIP (N)

16

181.42 mm² 19.3 x 9.4

SOIC (D)

16

59.4 mm² 9.9 x 6

SOP (NS)

16

79.56 mm² 10.2 x 7.8

TSSOP (PW)

16

32 mm² 5 x 6.4

100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range) =
        1 V at V_DD = 5 V
        2 V at V_DD = 10 V
     2.5 V at V_DD = 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Output compatible with two HTL loads, two low power TTL loads, or one low power Schottky TTL load
Functional equivalent to TTL74175
Standardized, symmetrical output characteristics
Applications:
- Shift registers
- Buffer/storage registers
- Pattern generators

100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range) =
        1 V at V_DD = 5 V
        2 V at V_DD = 10 V
     2.5 V at V_DD = 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Output compatible with two HTL loads, two low power TTL loads, or one low power Schottky TTL load
Functional equivalent to TTL74175
Standardized, symmetrical output characteristics
Applications:
- Shift registers
- Buffer/storage registers
- Pattern generators

Cd40175B consists of four identical D-type flip-flops. Each flip-flop has an independent DATA D input and complementary Q and Q\ outputs. The CLOCK and CLEAR inputs are common to all flip-flops. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All four flip-flops are simultaneously reset by a low level on the CLEAR input.

These devices can function as shift register elements or as T-type flip-flops for toggle and counter applications.

The CD40175B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

Cd40175B consists of four identical D-type flip-flops. Each flip-flop has an independent DATA D input and complementary Q and Q\ outputs. The CLOCK and CLEAR inputs are common to all flip-flops. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All four flip-flops are simultaneously reset by a low level on the CLEAR input.

These devices can function as shift register elements or as T-type flip-flops for toggle and counter applications.

The CD40175B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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