CD4030B

활성

쿼드러플 2-입력 3V-18V XOR(배타적 OR) 게이트

지금 주문

데이터시트

document-pdfAcrobat CD4030B TYPES datasheet (Rev. C) (영어)

CD4030B

활성

데이터시트

지금 주문

제품 상세 정보

Technology family

CD4000

Supply voltage (min) (V)

Supply voltage (max) (V)

Number of channels

Inputs per channel

IOL (max) (mA)

6.8

Input type

Standard CMOS

IOH (max) (mA)

-6.8

Output type

Push-Pull

Features

Standard speed (tpd > 50ns)

Data rate (max) (Mbps)

Rating

Catalog

Operating temperature range (°C)

-55 to 125

Technology family

CD4000

Supply voltage (min) (V)

Supply voltage (max) (V)

Number of channels

Inputs per channel

IOL (max) (mA)

6.8

Input type

Standard CMOS

IOH (max) (mA)

-6.8

Output type

Push-Pull

Features

Standard speed (tpd > 50ns)

Data rate (max) (Mbps)

Rating

Catalog

Operating temperature range (°C)

-55 to 125

PDIP (N)

181.42 mm² 19.3 x 9.4

SOIC (D)

51.9 mm² 8.65 x 6

SOP (NS)

79.56 mm² 10.2 x 7.8

TSSOP (PW)

32 mm² 5 x 6.4

Medium-speed operation—t_PHL, t_PLH = 65 ns (typ.) at V_DD = 10 V, C_L = 50 pF
100% tested for quiescent current at 20 V
Standardized, symmetrical output characteristics
5-V, 10-V, and 15-V parametric ratings
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package-temperature range) =
     1 V at V_DD = 5 V
     2 V at V_DD = 10 V
  2.5 V at V_DD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
- Even and odd-parity generators and checkers
- Logical comparators
- Adders/subtractors
- General logic functions

Data sheet acquired from Harris Semiconductor

Medium-speed operation—t_PHL, t_PLH = 65 ns (typ.) at V_DD = 10 V, C_L = 50 pF
100% tested for quiescent current at 20 V
Standardized, symmetrical output characteristics
5-V, 10-V, and 15-V parametric ratings
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package-temperature range) =
     1 V at V_DD = 5 V
     2 V at V_DD = 10 V
  2.5 V at V_DD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
- Even and odd-parity generators and checkers
- Logical comparators
- Adders/subtractors
- General logic functions

Data sheet acquired from Harris Semiconductor

CD4030B types consist of four independent Exclusive-OR gates. THe CD4030B provides the system designer with a means for direct implementation of the Exclusive-OR function.

The CD4030B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4030B types consist of four independent Exclusive-OR gates. THe CD4030B provides the system designer with a means for direct implementation of the Exclusive-OR function.

open-in-new

기타 XOR(배타적 OR) 게이트 찾기

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new

대안 비교

비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀

CD74AC86

활성

4채널 2입력 1.5V~5.5V XOR(배타적 OR) 게이트 Smaller voltage range (2V to 6V), shorter average propagation delay (7ns), higher average drive strength (24mA)

다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능

SN74HC86

활성

4채널 2입력 2V~6V XOR(배타적 OR) 게이트 Voltage range (2V to 6V), average drive strength (8mA), average propagation delay (20ns)

기술 문서

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모두 보기7

	유형	직함	날짜
*	Data sheet	CD4030B TYPES datasheet (Rev. C)	2003/08/21
	Selection guide	Logic Guide (Rev. AB)	2017/06/12
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	2015/12/02
	User guide	LOGIC Pocket Data Book (Rev. B)	2007/01/16
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	2004/07/08
	User guide	Signal Switch Data Book (Rev. A)	2003/11/14
	Application note	Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics	2001/12/03