전력 관리 게이트 드라이버 하프 브리지 드라이버

LM2724A

활성

고속 3A 동기형 MOSFET 드라이버

제품 상세 정보

Operating temperature range (°C) -40 to 125 Rating Catalog Features UVLO Fixed
Operating temperature range (°C) -40 to 125 Rating Catalog Features UVLO Fixed
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm)
  • Shoot-Through Protection
  • Input Under-Voltage-Lock-Out
  • 3A Peak Driving Current
  • 195µA Quiescent Current
  • 28V Input Voltage in Buck Configuration
  • SOIC-8 and WSON Packages

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  • Shoot-Through Protection
  • Input Under-Voltage-Lock-Out
  • 3A Peak Driving Current
  • 195µA Quiescent Current
  • 28V Input Voltage in Buck Configuration
  • SOIC-8 and WSON Packages

All trademarks are the property of their respective owners.

The LM2724A is a dual N-channel MOSFET driver which can drive both the top and bottom MOSFETs in a push-pull structure simultaneously. The LM2724A takes a logic input and splits it into two complimentary signals with a typical 20ns dead time in between. The built-in cross-conduction protection circuitry prevents the top and bottom MOSFETs from turning on simultaneously. With a bias voltage of 5V, the peak sourcing and sinking current for each driver of the LM2724A is about 3A. Input UVLO (Under-Voltage-Lock-Out) ensures that all the driver outputs stay low until the supply rail exceeds the power-on threshold during system power on, or after the supply rail drops below power-on threshold by a specified hysteresis during system power down. The cross-conduction protection circuitry detects both driver outputs and will not turn on a driver until the other driver output is low. The top gate voltage needed by the top MOSFET is obtained through an external boot-strap structure. When not switching, the LM2724A only draws up to 195µA from the 5V rail. The synchronization operation of the bottom MOSFET can be disabled by pulling the SYNC pin to ground.

The LM2724A is a dual N-channel MOSFET driver which can drive both the top and bottom MOSFETs in a push-pull structure simultaneously. The LM2724A takes a logic input and splits it into two complimentary signals with a typical 20ns dead time in between. The built-in cross-conduction protection circuitry prevents the top and bottom MOSFETs from turning on simultaneously. With a bias voltage of 5V, the peak sourcing and sinking current for each driver of the LM2724A is about 3A. Input UVLO (Under-Voltage-Lock-Out) ensures that all the driver outputs stay low until the supply rail exceeds the power-on threshold during system power on, or after the supply rail drops below power-on threshold by a specified hysteresis during system power down. The cross-conduction protection circuitry detects both driver outputs and will not turn on a driver until the other driver output is low. The top gate voltage needed by the top MOSFET is obtained through an external boot-strap structure. When not switching, the LM2724A only draws up to 195µA from the 5V rail. The synchronization operation of the bottom MOSFET can be disabled by pulling the SYNC pin to ground.

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기술 자료

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6개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 LM2724A High Speed 3A Synchronous MOSFET Driver datasheet (Rev. C) 2013. 3. 28
애플리케이션 노트 Using Half-Bridge Gate Driver to Achieve 100% Duty Cycle for High Side FET PDF | HTML 2024. 3. 25
애플리케이션 노트 Bootstrap Circuitry Selection for Half Bridge Configurations (Rev. A) PDF | HTML 2023. 9. 8
애플리케이션 노트 Comparative Analysis of Two Different Methods for Gate-Drive Current Boosting (Rev. A) PDF | HTML 2022. 2. 17
Application brief External Gate Resistor Selection Guide (Rev. A) 2020. 2. 28
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020. 2. 28

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