데이터 시트
SN54HC273-DIE
- Wide Operating Voltage Range
- Outputs Can Drive Up To 10 LSTTL Loads
- Low Power Consumption
- Typical tpd = 12 ns
- Low Input Current
- Contain Eight Flip-Flops With
Single-Rail Outputs - Direct Clear Input
- Applications Include:
- Buffer/Storage Registers
- Shift Registers
- Pattern Generators
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.
기술 자료
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| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | Rad-Tolerant Space Grade Die, Quadruple 2-Input Positive-AND Gate, SN54HC273-DIE datasheet | 2013. 6. 3 |