홈 로직 및 전압 변환 플립플롭, 래치 및 레지스터 시프트 레지스터
홈
로직 및 전압 변환
플립플롭, 래치 및 레지스터
시프트 레지스터

SN54HC595-SP

활성

3상 출력 레지스터를 지원하는 8비트 시프트 레지스터

지금 주문
데이터 시트

SN54HC595-SP

활성
데이터 시트 지금 주문

제품 상세 정보

Configuration Serial-in, Parallel-out Bits (#) 8 Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Standard CMOS Output type 3-State Clock frequency (MHz) 24 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 160 Features Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Space
Configuration Serial-in, Parallel-out Bits (#) 8 Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Standard CMOS Output type 3-State Clock frequency (MHz) 24 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 160 Features Balanced outputs, High speed (tpd 10-50ns), Output register, Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Space
CDIP (J) 16 135.3552 mm² 19.56 x 6.92 CFP (W) 16 69.319 mm² 10.3 x 6.73
  • 8-bit serial-in, parallel-out shift
  • Wide operating voltage range of 2 V to 6 V
  • High-current 3-state outputs can drive up to 15 LSTTL loads
  • Low power consumption: 80-µA (maximum) ICC
  • tpd = 13 ns (typical)
  • ±6-mA output drive at 5 V
  • Low input current: 1 µA (maximum)
  • Shift register has direct clear
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
  • 8-bit serial-in, parallel-out shift
  • Wide operating voltage range of 2 V to 6 V
  • High-current 3-state outputs can drive up to 15 LSTTL loads
  • Low power consumption: 80-µA (maximum) ICC
  • tpd = 13 ns (typical)
  • ±6-mA output drive at 5 V
  • Low input current: 1 µA (maximum)
  • Shift register has direct clear
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

The SNx4HC595 devices contain an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.

The SNx4HC595 devices contain an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.
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기술 자료

star =TI에서 선정한 이 제품의 인기 문서
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21개 모두 보기
유형 직함 날짜
* Data sheet SNx4HC595 8-Bit Shift Registers With 3-State Output Registers datasheet (Rev. J) PDF | HTML 2021/10/07
* SMD SN54HC595-SP SMD 5962-86816 2016/07/08
Application brief DLA Approved Optimizations for QML Products (Rev. A) PDF | HTML 2024/06/05
Selection guide TI Space Products (Rev. J) 2024/02/12
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 2023/08/31
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 2022/12/15
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 2022/11/17
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022/10/19
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note Designing With Logic (Rev. C) 1997/06/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996/05/01
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996/04/01

설계 및 개발

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패키지 핀 CAD 기호, 풋프린트 및 3D 모델
CDIP (J) 16 Ultra Librarian
CFP (W) 16 Ultra Librarian
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주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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