SN54LVC32A
- Operate from 1.65V to 3.6V
- Specified from –40°C to +85°C, –40°C to +125°C, and –55°C to +125°C
- Inputs accept voltages to 5.5V
- Max tpd of 3.8ns at 3.3V
- Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, TA = 25°C
- Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, TA = 25°C
- Latch-up performance exceeds 250mA per JESD 17
- On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
- ESD protection exceeds JESD 22
- 2000V human-body model
- 1000V charged-device model
The SN54LVC32A quadruple 2-input positive-OR gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC32A quadruple 2-input positive-OR gate is designed for 1.65V to 3.6V VCC operation.
The SNx4LVC32A devices perform the Boolean function Y = A + B or Y = /A • /B in positive logic.
Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.
기술 자료
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2개 모두 보기
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | SNx4LVC32A Quadruple 2-Input Positive-OR Gates datasheet (Rev. U) | PDF | HTML | 2024. 7. 29 | |
| * | SMD | SN54LVC32A SMD 5962-97618 | 2016. 6. 21 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| LCCC (FK) | 20 | Ultra Librarian |
| CFP (W) | 14 | Ultra Librarian |
| CDIP (J) | 14 | Ultra Librarian |