SN74ABT16827
- Members of the Texas Instruments WidebusTM Family
- State-of-the-Art EPIC-II BTM BiCMOS Design Significantly Reduces Power Dissipation
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
- High-Impedance State During Power Up and Power Down
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- Flow-Through Architecture Optimizes PCB Layout
- High-Drive Outputs (-32-mA IOH, 64-mA IOL)
- Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Package and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings
Widebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.
The 'ABT16827 are noninverting 20-bit buffers composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT16827 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16827 is characterized for operation from -40°C to 85°C.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | 20-Bit Buffers/Drivers With 3-State Outputs datasheet (Rev. C) | 1997. 5. 1 |
설계 및 개발
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