홈 로직 및 전압 변환 플립플롭, 래치 및 레지스터 D형 플립플롭
홈
로직 및 전압 변환
플립플롭, 래치 및 레지스터
D형 플립플롭

SN74ALS273

활성

클리어를 지원하는 8진 D형 양극 에지 트리거 플립플롭

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데이터 시트

SN74ALS273

활성
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제품 상세 정보

Number of channels 8 Technology family ALS Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 70 IOL (max) (mA) 24 IOH (max) (mA) -2.6 Supply current (max) (µA) 29000 Features High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 8 Technology family ALS Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 70 IOL (max) (mA) 24 IOH (max) (mA) -2.6 Supply current (max) (µA) 29000 Features High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 20 228.702 mm² (24.33 mm × 9.4 mm) SOP (NS) 20 98.28 mm² (12.6 mm × 7.8 mm) SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm)
  • Contain Eight Flip-Flops With Single-Rail Outputs
  • Buffered Clock and Direct-Clear Inputs
  • Individual Data Input to Each Flip-Flop
  • Applications Include:
  • Buffer/Storage Registers
  • Shift Registers
  • Pattern Generators
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

 
  • Contain Eight Flip-Flops With Single-Rail Outputs
  • Buffered Clock and Direct-Clear Inputs
  • Individual Data Input to Each Flip-Flop
  • Applications Include:
  • Buffer/Storage Registers
  • Shift Registers
  • Pattern Generators
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

 

These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input.

Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.

The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.

 

 

These octal positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct-clear () input.

Information at the data (D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input signal has no effect at the output.

The SN54ALS273 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS273 is characterized for operation from 0°C to 70°C.

 

 
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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀.
CD74AC273 활성 리셋을 지원하는 8진 D형 플립플롭 Voltage range 2V to 6V, average propagation delay 7ns, average drive strength 24mA
SN74HC273 활성 클리어를 지원하는 8진 D형 플립플롭 Voltage range 2V to 6V, average propagation delay 20ns, average drive strength 8mA

기술 자료

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* 데이터 시트 Octal D-Type Flip-Flops With Clear datasheet (Rev. A) 1994. 12. 1

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