SN74ALS843

Name: SN74ALS843
Brand: TI
SKU: SN74ALS843
Price: 3.533 USD

활성

3상 출력을 지원하는 9비트 버스 인터페이스 D형 래치

지금 주문

데이터 시트

document-pdfAcrobat 9-Bit Bus-Interface D-Type Latch With 3-State Outputs datasheet (Rev. A) (영어)

SN74ALS843

활성

데이터 시트

지금 주문

제품 상세 정보

Number of channels

Technology family

ALS

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

3-State

Clock frequency (max) (MHz)

IOL (max) (mA)

IOH (max) (mA)

-2.6

Supply current (max) (µA)

67000

Features

Flow-through pinout, High speed (tpd 10-50ns)

Operating temperature range (°C)

0 to 70

Rating

Catalog

Number of channels

Technology family

ALS

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

3-State

Clock frequency (max) (MHz)

IOL (max) (mA)

IOH (max) (mA)

-2.6

Supply current (max) (µA)

67000

Features

Flow-through pinout, High speed (tpd 10-50ns)

Operating temperature range (°C)

0 to 70

Rating

Catalog

SOIC (DW)

159.65 mm² 15.5 x 10.3

3-State Buffer-Type Outputs Drive Bus Lines Directly
Bus-Structured Pinout
Provides Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
Buffered Control Inputs to Reduce
dc Loading Effects
Power-Up High-Impedance State
Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

3-State Buffer-Type Outputs Drive Bus Lines Directly
Bus-Structured Pinout
Provides Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
Buffered Control Inputs to Reduce
dc Loading Effects
Power-Up High-Impedance State
Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

This 9-bit bus-interface D-type latch features 3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The nine latches are transparent D-type latches with noninverting data (D) inputs.

A buffered output-enable () input places the nine outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off.

The SN74ALS843 is characterized for operation from 0°C to 70°C.

This 9-bit bus-interface D-type latch features 3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The nine latches are transparent D-type latches with noninverting data (D) inputs.

does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off.

The SN74ALS843 is characterized for operation from 0°C to 70°C.

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