SN74ALVCH16244

활성

버스 홀드 및 3상 출력을 지원하는 16채널, 1.65V~3.6V 버퍼

지금 주문하기

데이터 시트

document-pdfAcrobat SN74ALVCH16244 datasheet (Rev. K) (영어)

SN74ALVCH16244

활성

데이터 시트

지금 주문하기

제품 상세 정보

Technology family

ALVC

Number of channels

16

IOL (max) (mA)

24

Supply current (max) (µA)

40

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

ALVC

Number of channels

16

IOL (max) (mA)

24

Supply current (max) (µA)

40

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

TVSOP (DGV)

48

62.08 mm² (9.7 mm × 6.4 mm)

SSOP (DL)

48

164.358 mm² (15.88 mm × 10.35 mm)

TSSOP (DGG)

48

101.25 mm² (12.5 mm × 8.1 mm)

Member of the Texas Instruments Widebus™ Family
Operates From 1.65 V to 3.6 V
Max t_pd of 3 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

Member of the Texas Instruments Widebus™ Family
Operates From 1.65 V to 3.6 V
Max t_pd of 3 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVCH16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVCH16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

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대안 비교

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SN74AVC16244

활성

3상 출력을 지원하는 16채널, 1.4V~3.6V 버퍼 Voltage range 0.9V to 3.6V, average propagation delay 2ns, average drive strength 12mA

SN74ABTH16244

활성

버스 홀드, TTL 호환 CMOS 입력 및 3상태 출력을 지원하는 16채널, 4.5V~5.5V 버퍼 Voltage range 4.5V to 5.5V, average propagation delay 4.6ns, average drive strength 64mA

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3개 모두 보기

상위 문서	유형	직함	날짜
*	데이터 시트	SN74ALVCH16244 datasheet (Rev. K)	2005. 8. 26
	애플리케이션 노트	An Overview of Bus-Hold Circuit and the Applications (Rev. B)	2018. 9. 17
	애플리케이션 노트	Timing Differences of 10-pF Versus 50pF Loading	1996. 11. 1