SN74ALVCH16825

Name: SN74ALVCH16825
Brand: TI
SKU: SN74ALVCH16825
Price: 0.638 USD

활성

버스 홀드 및 3상 출력을 지원하는 18채널, 1.65V~3.6V 버퍼

지금 주문

데이터 시트

document-pdfAcrobat SN74ALVCH16825 datasheet (Rev. D) (영어)

SN74ALVCH16825

활성

데이터 시트

지금 주문

제품 상세 정보

Technology family

ALVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

IOL (max) (mA)

Supply current (max) (µA)

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

ALVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

IOL (max) (mA)

Supply current (max) (µA)

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SSOP (DL)

190.647 mm² 18.42 x 10.35

TSSOP (DGG)

113.4 mm² 14 x 8.1

Member of the Texas Instruments Widebus™ Family
EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JESD 17
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

Widebus, EPIC are trademarks of Texas Instruments.

Member of the Texas Instruments Widebus™ Family
EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JESD 17
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

Widebus, EPIC are trademarks of Texas Instruments.

This 18-bit buffer and line driver is designed for 1.65-V to 3.6-V V_CC operation.

This SN74ALVCH16825 improves the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as two 9-bit buffers or one 18-bit buffer. It provides true data.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all nine affected outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.

The SN74ALVCH16825 is characterized for operation from &$150;40°C to 85°C.

This 18-bit buffer and line driver is designed for 1.65-V to 3.6-V V_CC operation.

This SN74ALVCH16825 improves the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as two 9-bit buffers or one 18-bit buffer. It provides true data.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all nine affected outputs are in the high-impedance state.

Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.

The SN74ALVCH16825 is characterized for operation from &$150;40°C to 85°C.

filter

기타 비인버팅 버퍼 및 드라이버 찾기

다운로드 스크립트와 함께 비디오 보기 동영상

기술 자료

star

=TI에서 선정한 이 제품의 인기 문서

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.

19개 모두 보기

	유형	직함	날짜
*	Data sheet	SN74ALVCH16825 datasheet (Rev. D)	2004/09/02
	Application note	An Overview of Bus-Hold Circuit and the Applications (Rev. B)	2018/09/17
	Selection guide	Logic Guide (Rev. AB)	2017/06/12
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	2015/12/02
	User guide	LOGIC Pocket Data Book (Rev. B)	2007/01/16
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	2004/07/08
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	2002/08/29
	User guide	ALVC Advanced Low-Voltage CMOS Including SSTL, HSTL, And ALB (Rev. B)	2002/08/01
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards	2002/06/13
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)	2002/05/22
	Application note	Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)	1999/09/08
	Application note	TI SN74ALVC16835 Component Specification Analysis for PC100	1998/08/03
	Application note	Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)	1998/05/13
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices	1997/12/01
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)	1997/08/01
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)	1997/06/01
	Application note	Input and Output Characteristics of Digital Integrated Circuits	1996/10/01
	Application note	Live Insertion	1996/10/01
	Application note	Understanding Advanced Bus-Interface Products Design Guide	1996/05/01