SN74CBTLV16800
- Member of the Texas Instruments Widebus™ Family
- 5-
Switch Connection Between Two Ports - Rail-to-Rail Switching on Data I/O Ports
- Ioff Supports Partial-Power-Down Mode Operation
- B-Port Outputs Are Precharged by Bias Voltage to Minimize Signal Distortion During Live Insertion
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
Widebus is a trademark of Texas Instruments.
The SN74CBTLV16800 provides 20 bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The device also precharges the B port to a user-selectable bias voltage (BIASV) to minimize live-insertion noise.
The device is organized as dual 10-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 10-bit bus switches or one 20-bit bus switch. When OE\ is low, the associated 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, the high-impedance state exists between the two ports, and port B is precharged to BIASV through the equivalent of a 10-k resistor.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | SN74CBTLV16800 datasheet (Rev. J) | 2003. 10. 10 | ||
| 애플리케이션 노트 | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022. 6. 2 | ||
| 애플리케이션 노트 | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021. 12. 1 | ||
| Application brief | Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) | PDF | HTML | 2021. 1. 6 | ||
| 애플리케이션 노트 | Bus FET Switch Solutions for Live Insertion Applications | 2003. 2. 7 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| TVSOP (DGV) | 48 | Ultra Librarian |
| TSSOP (DGG) | 48 | Ultra Librarian |
| SSOP (DL) | 48 | Ultra Librarian |