SN74FB1650
- Compatible With IEEE Std 1194.1-1991 (BTL)
- TTL A Port, Backplane Transceiver Logic (BTL) B\ Port
- Open-Collector B\-Port Outputs Sink 100 mA
- BIAS VCC Minimizes Signal Distortion During Live Insertion or Withdrawal
- High-Impedance State During Power Up and Power Down
- B\-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage
- TTL-Input Structures Incorporate Active Clamping to Aid in Line Termination
The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.
The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCC is less than 2.1 V, the B\ port is turned off.
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state.
BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
BG VCC and BG GND are the supply inputs for the bias generator.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | SN74FB1650 datasheet (Rev. O) | 2004. 3. 10 | ||
| 애플리케이션 노트 | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024. 7. 12 | ||
| 애플리케이션 노트 | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024. 7. 3 | ||
| 선택 가이드 | Voltage Translation Buying Guide (Rev. A) | 2021. 4. 15 | |||
| 애플리케이션 노트 | Next-Generation BTL/Futurebus Transceivers Allow Single-Sided SMT Manufacturing (Rev. C) | 1997. 3. 1 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| HLQFP (PCA) | 100 | Ultra Librarian |