SN74HCS164
- Wide operating voltage range: 2 V to 6 V
- Schmitt-trigger inputs allow for slow or noisy input signals
- Low power consumption
- Typical ICC of 100 nA
- Typical input leakage current of ±100 nA
- ±7.8-mA output drive at 6 V
- Extended ambient temperature range: –40°C to +125°C, TA
The SN74HCS164 device contains an 8-bit shift register with AND-gated serial inputs and an asynchronous clear ( CLR) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum set-up time requirements are met. Clocking occurs on the low-to-high-level transition of CLK. All inputs include Schmitt-triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals.
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6개 모두 보기 | 상위 문서 | 유형 | 직함 | 형식 옵션 | 날짜 |
|---|---|---|---|---|
| * | Data sheet | SN74HCS164 8-Bit Parallel-Out Serial Shift Registers With Schmitt-Trigger Inputs datasheet (Rev. B) | PDF | HTML | 2021/12/07 |
| Application brief | Using Linear Interpolation to Estimate Specification Values | PDF | HTML | 2026/04/13 | |
| Application note | The Davies Sinusoidal Generator | PDF | HTML | 2022/10/31 | |
| Application note | Designing with Shift Registers | PDF | HTML | 2022/07/14 | |
| Application brief | Overcoming Last-Minute Feature Creep with Modern Shift Registers | PDF | HTML | 2020/11/03 | |
| Technical article | New logic family enables noise-tolerant and lower-power system designs | PDF | HTML | 2019/11/12 |
주문 및 품질
포함된 정보:
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
포함된 정보:
- 팹 위치
- 조립 위치