SN74LVC2G126-EP

활성

3상 출력을 지원하는 향상된 제품 2채널, 1.65V~5.5V 버퍼

제품 상세 정보

Technology family LVC Number of channels 2 IOL (max) (mA) 32 Supply current (max) (µA) 10 IOH (max) (mA) -32 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Technology family LVC Number of channels 2 IOL (max) (mA) 32 Supply current (max) (µA) 10 IOH (max) (mA) -32 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
VSSOP (DCU) 8 6.2 mm² (2 mm × 3.1 mm)
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 6.8 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS

  • Controlled Baseline
  • One Assembly and Test Site
  • One Fabrication Site
  • Available in Military (–55°C to 125°C) Temperature Range
  • Extended Product Life Cycle
  • Extended Product-Change Notification
  • Product Traceability

  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 6.8 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    >2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS

  • Controlled Baseline
  • One Assembly and Test Site
  • One Fabrication Site
  • Available in Military (–55°C to 125°C) Temperature Range
  • Extended Product Life Cycle
  • Extended Product-Change Notification
  • Product Traceability

This dual bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC2G126 is a dual bus driver/line driver with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This dual bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC2G126 is a dual bus driver/line driver with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

다운로드 스크립트와 함께 비디오 보기 비디오

기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
3개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 Dual Bus Buffer Gate With 3-State Outputs, SN74LVC2G126-EP datasheet 2013. 12. 12
* 방사능 및 안정성 보고서 CLVC2G126MDCUTEP Reliability Report 2014. 12. 16
* VID SN74LVC2G126-EP VID V6214604 2016. 6. 21

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

패키지 CAD 기호, 풋프린트 및 3D 모델
VSSOP (DCU) 8 Ultra Librarian

주문 및 품질

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상