홈 전원 관리 선형 및 저손실(LDO) 레귤레이터
홈
전원 관리
선형 및 저손실(LDO) 레귤레이터

TPS752-Q1

활성

전원 양호 및 활성화를 지원하는 오토모티브 2A, 초저 드롭아웃 전압 레귤레이터

지금 주문
데이터시트

TPS752-Q1

활성
데이터시트 지금 주문

제품 상세 정보

Output options Adjustable Output Iout (max) (A) 2 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 5.5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.8, 2.5, 3.3 Noise (µVrms) 60 Iq (typ) (mA) 0.07 Thermal resistance θJA (°C/W) 43 Rating Automotive Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 PSRR at 100 KHz (dB) 15 Dropout voltage (Vdo) (typ) (mV) 210 Operating temperature range (°C) -40 to 125
Output options Adjustable Output Iout (max) (A) 2 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 5.5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.8, 2.5, 3.3 Noise (µVrms) 60 Iq (typ) (mA) 0.07 Thermal resistance θJA (°C/W) 43 Rating Automotive Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 PSRR at 100 KHz (dB) 15 Dropout voltage (Vdo) (typ) (mV) 210 Operating temperature range (°C) -40 to 125
HTSSOP (PWP) 20 41.6 mm² 6.5 x 6.4
  • Qualified for Automotive Applications
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • 2-A Low-Dropout Voltage Regulator
  • Available in 1.5-V, 1.8-V, 2.5-V, 3.3-V Fixed Output and Adjustable Versions
  • Open Drain Power-On Reset With 100-ms Delay (TPS752xx)
  • Open Drain Power-Good (PG) Status Output (TPS754xx)
  • Dropout Voltage Typically 210 mV at 2 A (TPS75233)
  • Ultralow 75-µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 20-Pin TSSOP (PWP) PowerPAD™ Package
  • Thermal Shutdown Protection

PowerPAD is a trademark of Texas Instruments.
  • Qualified for Automotive Applications
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • 2-A Low-Dropout Voltage Regulator
  • Available in 1.5-V, 1.8-V, 2.5-V, 3.3-V Fixed Output and Adjustable Versions
  • Open Drain Power-On Reset With 100-ms Delay (TPS752xx)
  • Open Drain Power-Good (PG) Status Output (TPS754xx)
  • Dropout Voltage Typically 210 mV at 2 A (TPS75233)
  • Ultralow 75-µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 20-Pin TSSOP (PWP) PowerPAD™ Package
  • Thermal Shutdown Protection

PowerPAD is a trademark of Texas Instruments.

The TPS752xx and TPS754xx are low-dropout regulators with integrated power-on reset and power good (PG) functions, respectively. These devices are capable of supplying 2 A of output current with a dropout of 210 mV (TPS75233, TPS75433). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS752xx and TPS754xx are designed to have fast transient response for larger load current changes.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 210 mV at an output current of 2 A for the TPS75x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 2 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.

The device is enabled when the EN pin is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C.

The RESET (SVS, POR, or power on reset) output of the TPS752xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS752xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET goes to a high impedance state after a 100-ms delay. RESET goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.

The TPS754xx has a power good terminal (PG) as an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS752xx or the TPS754xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS752xx and the TPS754xx families are available in 20 pin TSSOP (PWP) packages.

The TPS752xx and TPS754xx are low-dropout regulators with integrated power-on reset and power good (PG) functions, respectively. These devices are capable of supplying 2 A of output current with a dropout of 210 mV (TPS75233, TPS75433). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS752xx and TPS754xx are designed to have fast transient response for larger load current changes.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 210 mV at an output current of 2 A for the TPS75x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 2 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.

The device is enabled when the EN pin is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C.

The RESET (SVS, POR, or power on reset) output of the TPS752xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS752xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET goes to a high impedance state after a 100-ms delay. RESET goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.

The TPS754xx has a power good terminal (PG) as an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS752xx or the TPS754xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS752xx and the TPS754xx families are available in 20 pin TSSOP (PWP) packages.
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기술 문서

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모두 보기3
유형 직함 날짜
* Data sheet Fast-Transient-Response 2-A Low-Dropout Voltage Regulators datasheet (Rev. C) 2008/04/30
Application note LDO Noise Demystified (Rev. B) PDF | HTML 2020/08/18
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017/08/09

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주문 및 품질

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  • REACH
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  • 납 마감/볼 재질
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  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
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