패키징 정보
| 패키지 | 핀 HTQFP (PFP) | 80 |
| 작동 온도 범위(°C) -40 to 110 |
| 패키지 수량 | 캐리어 96 | JEDEC TRAY (10+1) |
TSB41BA3F-EP의 주요 특징
- New features (for ports operating in BETA mode): detection of loss-of-scrambler-sync, fast power-on re-connect, fast re-train upon loss-of-sync, fast tone debounce, fast connection (skip tone debounce and speed negotiation) see Section 13.2.3
- Fully supports provisions of 1394-1995, IEEE 1394a-2000 and IEEE 1394b-2002 at s100, s100b, s200, s200b, s400, and s400b signaling rates (b signifies IEEE 1394b signaling) see Section 13.1
- Provides three fully backward-compatible, bilingual 1394b at 400-Mbps and 1394a-2000 compliant at 100/200/400-Mbps
- Full 1394a-2000 support includes: connection debounce, arbitrated short reset, multispeed concatenation, arbitration acceleration, fly-by concatenation, port disable/suspend/resume, extended resume signaling for compatibility with legacy dv devices
- Fully interoperable with Firewire™, DTVLink, SB1394, DishWire, and i.LINK™ implementation of IEEE std 1394
- Cable/transceiver hardware speed and port mode are selectable by terminal states
- Supports connection to CAT5 cable transceiver by setting ports to be beta-only, 400-Mbps-only, 200-Mbps-only or 100-Mbps-only
- Supports connection to s200 plastic optical fiber transceivers by setting ports to be beta-only, 200-Mbps-only, and 100-Mbps-only
- Optical signal detect input for all ports in beta mode enables connection to optical transceivers
- Supports use of 1394a connectors by allowing ports 1 and 2 to be forced to 1394a-only mode
- PHY-LINK interface selectable from 1394a-2000 mode (2/4/8 bits at 49.152 Mhz) or 1394b mode (8 bits at 98.304 Mhz)
- Register bits give software control of software device reset, contender bit, power class bits, link active control bit, and 1394a-2000 features
- Separate bias (tpbias) for each port
- Cable ports monitor line conditions for active connection to remote node
- Cable power presence monitoring
- 1394a-2000-compliant, common-mode noise filter on the incoming bias detect circuit to filter out crosstalk noise
- Power-down features to conserve energy in battery-powered applications
- Low-cost 49.152-Mhz crystal provides transmit and receive data at 100/200/400 Mbps and link-layer controller clock at 49.152-Mhz and 98.304-Mhz
- Interoperable with link-layer controllers using 3.3-V supplies
- Interoperable with other 1394 physical layers (PHYs) using 1.8-V, 3.3-V, and 5-V supplies
- Fail-safe circuitry senses sudden loss of power to the device and disables the ports to ensure that the TSB41BA3F-EP does not load the tpbias of any connected device and blocks any leakage from the port back to power plane
- Supports defense, aerospace, and medical applications:
- Controlled baseline
- One assembly/test site
- One fabrication site
- Extended product life cycle
- Extended product-change notification
- Product traceability
TSB41BA3F-EP에 대한 설명
The TSB41BA3F-EP provides the digital and analog transceiver functions needed to implement a three-port node in a cable-based IEEE 1394 network. Each cable port incorporates two differential line transceivers. The transceivers include circuitry to monitor the line conditions as needed for determining connection status, for initialization and arbitration, and for packet reception and transmission. The TSB41BA3F-EP interfaces with a link-layer controller (LLC), such as the TSB82AF15-EP, TSB12LV21, TSB12LV26, TSB12LV32, TSB42AA4, TSB42AB4, TSB12LV01B, TSB12LV01C, or the TSB82AA2. It can also be connected via cable port to an integrated 1394 Link + PHY layer such as the TSB43AB2.