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CDCEL913-Q1

現行

具 1.8-V LVCMOS 輸出的汽車類可編程 1-PLL VCXO 時脈合成器

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產品規格表

CDCEL913-Q1

現行
產品規格表 立即訂購

產品詳細資料

Function Clock generator, Spread-spectrum clock generator Number of outputs 3 Output frequency (max) (MHz) 230 Core supply voltage (V) 1.8 Output supply voltage (V) 1.8 Input type LVCMOS, XTAL Output type LVCMOS Operating temperature range (°C) -40 to 85 Features I2C, Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC) Rating Automotive
Function Clock generator, Spread-spectrum clock generator Number of outputs 3 Output frequency (max) (MHz) 230 Core supply voltage (V) 1.8 Output supply voltage (V) 1.8 Input type LVCMOS, XTAL Output type LVCMOS Operating temperature range (°C) -40 to 85 Features I2C, Integrated EEPROM, Multiplier or divider, Spread-spectrum clocking (SSC) Rating Automotive
TSSOP (PW) 14 32 mm² 5 x 6.4
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grades
      • Grade 1 For CDCE913-Q1: –40°C to +125°C ambient operating temperature
      • Grade 3 For CDCEL913-Q1: –40°C to +85°C ambient operating temperature
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C6
  • Functional Safety-Capable
  • In-system programmability and EEPROM
    • Serial programmable volatile register
    • Nonvolatile EEPROM to store customer settings
  • Flexible input clocking concept
    • External crystal: 8MHz to 32MHz
    • On-chip VCXO: pull range ±150ppm
    • Single-ended LVCMOS up to 160MHz
  • Free selectable output frequency up to 230MHz
  • Low-noise PLL core
    • PLL loop filter components integrated
    • Low period jitter (typical 50ps)
  • Separate output supply pins:
    • CDCE913-Q1: 3.3V and 2.5V
    • CDCEL913-Q1: 1.8V
  • Flexible clock driver
    • Three user-definable control inputs [S0, S1, S2], for example, SSC selection, frequency switching, output enable, or power down
    • Generates highly accurate clocks for video, audio, USB, IEEE1394, RFID, Bluetooth, WLAN, Ethernet, and GPS
    • Generates common clock frequencies used with TI- DaVinci™, OMAP™, DSPs
    • Programmable SSC modulation
    • Enables 0-PPM clock generation
  • 1.8V device power supply
  • Packaged in TSSOP
  • Development and programming kit for easy PLL design and programming (TI Pro-Clock™)
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grades
      • Grade 1 For CDCE913-Q1: –40°C to +125°C ambient operating temperature
      • Grade 3 For CDCEL913-Q1: –40°C to +85°C ambient operating temperature
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C6
  • Functional Safety-Capable
  • In-system programmability and EEPROM
    • Serial programmable volatile register
    • Nonvolatile EEPROM to store customer settings
  • Flexible input clocking concept
    • External crystal: 8MHz to 32MHz
    • On-chip VCXO: pull range ±150ppm
    • Single-ended LVCMOS up to 160MHz
  • Free selectable output frequency up to 230MHz
  • Low-noise PLL core
    • PLL loop filter components integrated
    • Low period jitter (typical 50ps)
  • Separate output supply pins:
    • CDCE913-Q1: 3.3V and 2.5V
    • CDCEL913-Q1: 1.8V
  • Flexible clock driver
    • Three user-definable control inputs [S0, S1, S2], for example, SSC selection, frequency switching, output enable, or power down
    • Generates highly accurate clocks for video, audio, USB, IEEE1394, RFID, Bluetooth, WLAN, Ethernet, and GPS
    • Generates common clock frequencies used with TI- DaVinci™, OMAP™, DSPs
    • Programmable SSC modulation
    • Enables 0-PPM clock generation
  • 1.8V device power supply
  • Packaged in TSSOP
  • Development and programming kit for easy PLL design and programming (TI Pro-Clock™)

The CDCE913-Q1 and CDCEL913-Q1 devices are modular, phase-locked loop (PLL)-based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCE913-Q1 and CDCEL913-Q1 for their own specifications.

The CDCE913-Q1 and CDCEL913-Q1 generate up to three output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS, as these platforms are evolving into smaller and more cost effective systems.

Also, each output can be programmed in-system for any clock frequency up to 230MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three, user-defined control pins. This eliminates the need to use an additional interface to control the clock. Specific power-up and power-down sequences can also be defined to the user’s needs.

The CDCE913-Q1 and CDCEL913-Q1 devices are modular, phase-locked loop (PLL)-based programmable clock synthesizers. These devices provide flexible and programmable options, such as output clocks, input signals, and control pins, so that the user can configure the CDCE913-Q1 and CDCEL913-Q1 for their own specifications.

The CDCE913-Q1 and CDCEL913-Q1 generate up to three output clocks from a single input frequency to enable both board space and cost savings. Additionally, with multiple outputs, the clock generator can replace multiple crystals with one clock generator. This makes the device well-suited for head unit and telematics applications in infotainment and camera systems in ADAS, as these platforms are evolving into smaller and more cost effective systems.

Also, each output can be programmed in-system for any clock frequency up to 230MHz through the integrated, configurable PLL. The PLL also supports spread-spectrum clocking (SSC) with programmable down and center spread. This provides better electromagnetic interference (EMI) performance to enable customers to pass industry standards such as CISPR-25.

Customization of frequency programming and SSC are accessed using three, user-defined control pins. This eliminates the need to use an additional interface to control the clock. Specific power-up and power-down sequences can also be defined to the user’s needs.
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類型 標題 日期
* Data sheet CDCE913-Q1 and CDCEL913-Q1 Programmable 1-PLL VCXO Clock Synthesizer s With 1.8V, 2.5V, and 3.3V Outputs datasheet (Rev. D) PDF | HTML 2024年 2月 8日
Application note Crystal or Crystal Oscillator Replacement with Silicon Devices 2014年 6月 18日
Application note VCXO Application Guideline for CDCE(L)9xx Family (Rev. A) 2012年 4月 23日
Application note General I2C / EEPROM usage for the CDCE(L)9xx family 2010年 1月 26日
Application note Troubleshooting I2C Bus Protocol 2009年 10月 19日
Application note Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913 2009年 9月 23日
Application note Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency 2008年 3月 31日

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DS90UB983-Q1EVM — DS90UB983-Q1 DisplayPort 至 FPD-Link IV 橋接串聯器評估模組

DS90Ux983-Q1EVM 是用於評估 DS90Ux983-Q1 DisplayPort 至 FPD-Link IV 串聯器的評估模組。DS90Ux983-Q1 支援超高解析度，包括在 60Hz 下每像素 30 位元的 4K。DisplayPort 輸入與 DisplayPort v1.4 相容，速度可達每通道 8.1Gbps，而 FPD-Link 介面在 FPD-Link IV 模式下支援每通道最高 13.5Gbps，或在 FPD-Link III 模式下支援每通道最高 3.675Gbps。DS90Ux983-Q1EVM 的 FPD-Link 互連是一款車用 Rosenberger (...)

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DS90UB983-Q1MEVM — DS90UB983-Q1 DisplayPort 至 FPD-Link IV 橋接串聯器評估模組

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Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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