產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 3.6 BW at Acl (MHz) 1200 Acl, min spec gain (V/V) 4.8 Slew rate (typ) (V/µs) 3000 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 3.9 Iq per channel (typ) (mA) 120 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 50 Operating temperature range (°C) -40 to 85 2nd harmonic (dBc) 53 3rd harmonic (dBc) 54 Frequency of harmonic distortion measurement (MHz) 750 GBW (typ) (MHz) 1200 Input bias current (max) (pA) 100000000 Features On chip gain resistors CMRR (typ) (dB) 68 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 3.6 BW at Acl (MHz) 1200 Acl, min spec gain (V/V) 4.8 Slew rate (typ) (V/µs) 3000 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 3.9 Iq per channel (typ) (mA) 120 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 50 Operating temperature range (°C) -40 to 85 2nd harmonic (dBc) 53 3rd harmonic (dBc) 54 Frequency of harmonic distortion measurement (MHz) 750 GBW (typ) (MHz) 1200 Input bias current (max) (pA) 100000000 Features On chip gain resistors CMRR (typ) (dB) 68 Rating Catalog
WQFN (RGH) 16 16 mm² 4 x 4
  • Typical Values unless Otherwise Specified.
  • −3 dB Bandwidth (VOUT = 0.80 VPP) 1.2 GHz
  • ±0.5 dB Gain Flatness (VOUT = 0.80 VPP) 330 MHz
  • Slew Rate 1300 V/μs
  • 2nd/3rd Harmonics (750 MHz) −53/−54 dBc
  • Fixed Gain 13.7 dB
  • Supply Current 120 mA
  • Single Supply Operation 3.3V ±10%
  • Adjustable Common-Mode Output Voltage

All trademarks are the property of their respective owners.

  • Typical Values unless Otherwise Specified.
  • −3 dB Bandwidth (VOUT = 0.80 VPP) 1.2 GHz
  • ±0.5 dB Gain Flatness (VOUT = 0.80 VPP) 330 MHz
  • Slew Rate 1300 V/μs
  • 2nd/3rd Harmonics (750 MHz) −53/−54 dBc
  • Fixed Gain 13.7 dB
  • Supply Current 120 mA
  • Single Supply Operation 3.3V ±10%
  • Adjustable Common-Mode Output Voltage

All trademarks are the property of their respective owners.

The LMH6555 is an ultra high speed differential line driver with 53 dB SFDR at 750 MHz. The LMH6555 features a fixed gain of 13.7 dB. An input to the device allows the output common mode voltage to be set independent of the input common mode voltage in order to simplify the interface to high speed differential input ADCs. A unique architecture allows the device to operate as a fully differential driver or as a single-ended to differential converter.

The outstanding linearity and drive capability (100Ω differential load) of this device are a perfect match for driving high speed analog-to-digital converters. When combined with the ADC081000/ ADC081500 (single or dual ADC), the LMH6555 forms an excellent 8-bit data acquisition system with analog bandwidths exceeding 750 MHz.

The LMH6555 is offered in a space saving 16-pin WQFN package.

The LMH6555 is an ultra high speed differential line driver with 53 dB SFDR at 750 MHz. The LMH6555 features a fixed gain of 13.7 dB. An input to the device allows the output common mode voltage to be set independent of the input common mode voltage in order to simplify the interface to high speed differential input ADCs. A unique architecture allows the device to operate as a fully differential driver or as a single-ended to differential converter.

The outstanding linearity and drive capability (100Ω differential load) of this device are a perfect match for driving high speed analog-to-digital converters. When combined with the ADC081000/ ADC081500 (single or dual ADC), the LMH6555 forms an excellent 8-bit data acquisition system with analog bandwidths exceeding 750 MHz.

The LMH6555 is offered in a space saving 16-pin WQFN package.

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類型 標題 日期
* Data sheet LMH6555 Low Distortion 1.2 GHz Differential Driver datasheet (Rev. D) 2013年 3月 18日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note AN-1704 LMH6555 Application as High Speed ADC Input Driver (Rev. A) 2013年 5月 1日
Application note AN-1719 Noise Figure Analysis Fully Differential Amplifier (Rev. A) 2013年 5月 1日
EVM User's guide AN-1615 LMH6555 Evaluation Board (Rev. A) 2013年 4月 26日
Application note Using High Speed Diff Amp to Drive ADCs (Rev. A) 2013年 4月 26日
Application note Adaptive Speed Control for Automotive Systems 2007年 11月 20日
Application note Selecting Amplifiers, ADCs, and Clocks for High-Performance Signal Paths 2007年 9月 13日
Application note A Walk Along the Signal Path (High-Speed Signal Path) 2005年 3月 30日

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開發板

LMH6555EVAL — LMH6555 評估板

The LMH6555 is specifically designed to work with TI's Ultra High Speed Data Converters, such as the ADC08(D)1000/1020, ADC08(D)1500/1520, and the ADC08(B)3000 products. Together with these data converters, the LMH6555 delivers 50 dB SFDR @ 750 MHz, making it ideal for many of today's 8-bit data (...)

使用指南: PDF
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模擬型號

LMH6555 PSpice Model (Rev. A)

SNOM158A.ZIP (120 KB) - PSpice Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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