LP8732-Q1
- AEC-Q100 qualified with the following results:
- Device temperature grade 1: –40°C to +125°C ambient operating temperature
- Input voltage: 2.8 V to 5.5 V
- Two high-efficiency step-down DC/DC converters:
- Output voltage: 0.7 V to 3.36 V
- Maximum output current 2 A per phase
- Adding and shedding auto phase and force multi-phase operations in dual-phase configuration
- Remote differential feedback voltage sensing in dual-phase configuration
- Programmable output-voltage slew rate from 0.5 mV/µs to 10 mV/µs
- 2-MHz switching frequency
- Spread-spectrum mode and phase interleaving for EMI reduction
- Two linear regulators:
- Input voltage: 2.5 V to 5.5 V
- Output voltage: 0.8 V to 3.3 V
- Maximum output current 300 mA
- Configurable general-purpose output signals (GPO, GPO2)
- Interrupt function with programmable masking
- Programmable power-good signal (PGOOD)
- Output short-circuit and overload protection
- Overtemperature warning and protection
- Overvoltage protection (OVP) and undervoltage lockout (UVLO)
- 28-pin, 5-mm × 5-mm VQFN package with wettable flanks
The LP8732xx-Q1 is designed to meet the power management requirements in automotive applications. The device has two step-down DC/DC converters (which can be configured as a single dual-phase regulator or two single-phase regulators), two linear regulators, and two general-purpose digital-output signals. The device is controlled by an I2C-compatible serial interface and by an enable signal.
The automatic PWM/PFM (AUTO mode) operation together with the automatic phase adding/shedding gives high efficiency over a wide output-current range. The LP8732xx-Q1 supports remote voltage sensing (differential in dual-phase configuration) to compensate IR drop between the regulator output and the point-of-load (POL), thus improving the accuracy of the output voltage. In addition, the switching clock can be forced to PWM mode and also synchronized to an external clock to minimize the disturbances.
The LP8732xx-Q1 device supports programmable start-up and shutdown delays and sequences including GPO signals synchronized to the enable signal. During start-up and voltage change, the device controls the output slew rate to minimize output voltage overshoot and the in-rush current.
技術文件
設計與開發
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探索包括 LP8732-Q1 的解決方案。TI 提供適用於 TI 與非 TI 之系統單晶片 (SoC)、處理器、微控制器、感測器或現場可編程邏輯閘陣列 (FPGA) 的電源供應解決方案。
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RHD) | 28 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。