OPA4364

現行

四路、5.5V、7MHz、RRIO 運算放大器

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TLV9064 現行 適合成本最佳化應用的四路、5.5-V、10-MHz、RRIO 運算放大器 Higher GBW (10MHz), higher slew rate (6.5V/µs), lower power (0.538mA Iq), wider supply (1.8V to 5.5V)

產品詳細資料

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Rail-to-rail In, Out GBW (typ) (MHz) 7 Slew rate (typ) (V/µs) 5 Vos (offset voltage at 25°C) (max) (mV) 2.5 Iq per channel (typ) (mA) 0.65 Vn at 1 kHz (typ) (nV√Hz) 17 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 3 Features Shutdown Input bias current (max) (pA) 10 CMRR (typ) (dB) 90 Iout (typ) (A) 0.045 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.01 Output swing headroom (to positive supply) (typ) (V) -0.01
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Rail-to-rail In, Out GBW (typ) (MHz) 7 Slew rate (typ) (V/µs) 5 Vos (offset voltage at 25°C) (max) (mV) 2.5 Iq per channel (typ) (mA) 0.65 Vn at 1 kHz (typ) (nV√Hz) 17 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 3 Features Shutdown Input bias current (max) (pA) 10 CMRR (typ) (dB) 90 Iout (typ) (A) 0.045 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.01 Output swing headroom (to positive supply) (typ) (V) -0.01
SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm)
  • 1.8-V Operation
  • MicroSIZE Packages
  • Bandwidth: 7 MHz
  • CMRR: 90 dB (Typical)
  • Slew Rate: 5 V/µs
  • Low Offset: 500 µV (Maximum)
  • Quiescent Current: 750 µA/Channel (Maximum)
  • Shutdown Mode: Less Than 1 µA/Channel
  • 1.8-V Operation
  • MicroSIZE Packages
  • Bandwidth: 7 MHz
  • CMRR: 90 dB (Typical)
  • Slew Rate: 5 V/µs
  • Low Offset: 500 µV (Maximum)
  • Quiescent Current: 750 µA/Channel (Maximum)
  • Shutdown Mode: Less Than 1 µA/Channel

The OPA363 and OPA364 families are high-performance, CMOS operational amplifiers optimized for very low voltage, single-supply operation. These miniature, low-cost amplifiers are designed to operate on single supplies from 1.8 V (±0.9 V) to 5.5 V
(±2.75 V). Applications include sensor amplification and signal conditioning in battery-powered systems.

The OPA363 and OPA364 families offer excellent CMRR without the crossover associated with traditional complimentary input stages. This feature results in excellent performance for driving analog-to-digital (A/D) converters without degradation of differential linearity and THD. The input common-mode range includes both the negative and positive supplies. The output voltage swing is within 10 mV of the rails.

The OPA363 family includes a shutdown mode. Under logic control, the amplifiers can be switched from normal operation to a standby current that is less than 1 µA.

The single version is available in the MicroSize 5-pin SOT-23 (6-pin SOT-23 for shutdown) and 8-pin SOIC. The dual version is available in 8-pin VSSOP, 10-pin VSSOP, 16-pin UQFN, and 8-pin SOIC packages. Quad packages are available in 14-pin TSSOP and 14-pin SOIC packages. All versions are specified for operation from –40°C to +125°C.

The OPA363 and OPA364 families are high-performance, CMOS operational amplifiers optimized for very low voltage, single-supply operation. These miniature, low-cost amplifiers are designed to operate on single supplies from 1.8 V (±0.9 V) to 5.5 V
(±2.75 V). Applications include sensor amplification and signal conditioning in battery-powered systems.

The OPA363 and OPA364 families offer excellent CMRR without the crossover associated with traditional complimentary input stages. This feature results in excellent performance for driving analog-to-digital (A/D) converters without degradation of differential linearity and THD. The input common-mode range includes both the negative and positive supplies. The output voltage swing is within 10 mV of the rails.

The OPA363 family includes a shutdown mode. Under logic control, the amplifiers can be switched from normal operation to a standby current that is less than 1 µA.

The single version is available in the MicroSize 5-pin SOT-23 (6-pin SOT-23 for shutdown) and 8-pin SOIC. The dual version is available in 8-pin VSSOP, 10-pin VSSOP, 16-pin UQFN, and 8-pin SOIC packages. Quad packages are available in 14-pin TSSOP and 14-pin SOIC packages. All versions are specified for operation from –40°C to +125°C.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 OPAx363, OPAx364 1.8-V, 7-MHz, 90-dB CMRR, Single-Supply, Rail-to-Rail I/O Operational Amplifier datasheet (Rev. F) PDF | HTML 2018/5/21
電子書 An Engineer’s Guide to Designing with Precision Amplifiers 2021/4/29
電子書 The Signal e-book: A compendium of blog posts on op amp design topics PDF | HTML 2017/3/28

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
支援產品和硬體
模擬型號

OPA364 PSpice Model (Rev. A)

SBOC025 (4 KB) - PSpice 模型
支援產品和硬體
模擬型號

OPA364 TINA-TI Reference Design (Rev. A)

SBOC208 (19 KB) - TINA-TI 參考設計
支援產品和硬體
模擬型號

OPA364 TINA-TI Spice Model

SBOM286.TSM (6 KB) - TINA-TI Spice 模型
支援產品和硬體
計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。

支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian

訂購與品質

支援與培訓

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