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放大器
運算放大器 (op amps)
一般用途運算放大器

TLV9064

現行

適合成本最佳化應用的四路、5.5-V、10-MHz、RRIO 運算放大器

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產品規格表

TLV9064

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Rail-to-rail In, Out GBW (typ) (MHz) 10 Slew rate (typ) (V/µs) 6.5 Vos (offset voltage at 25°C) (max) (mV) 1.6 Iq per channel (typ) (mA) 0.538 Vn at 1 kHz (typ) (nV√Hz) 16 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 0.53 Features Cost Optimized, EMI Hardened CMRR (typ) (dB) 103 Iout (typ) (A) 0.05 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.02 Output swing headroom (to positive supply) (typ) (V) -0.02
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Rail-to-rail In, Out GBW (typ) (MHz) 10 Slew rate (typ) (V/µs) 6.5 Vos (offset voltage at 25°C) (max) (mV) 1.6 Iq per channel (typ) (mA) 0.538 Vn at 1 kHz (typ) (nV√Hz) 16 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 0.53 Features Cost Optimized, EMI Hardened CMRR (typ) (dB) 103 Iout (typ) (A) 0.05 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.02 Output swing headroom (to positive supply) (typ) (V) -0.02
SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 WQFN (RTE) 16 9 mm² 3 x 3 X2QFN (RUC) 14 4 mm² 2 x 2
  • Rail-to-rail input and output
  • Low input offset voltage: ±0.3 mV
  • Unity-gain bandwidth: 10 MHz
  • Low broadband noise: 10 nV/√Hz
  • Low input bias current: 0.5 pA
  • Low quiescent current: 538 µA
  • Unity-gain stable
  • Internal RFI and EMI filter
  • Operational at supply voltages as low as 1.8 V
  • Easier to stabilize with higher capacitive load due to resistive open-loop output impedance
  • Shutdown version: TLV906xS
  • Extended temperature range: –40°C to 125°C
  • Rail-to-rail input and output
  • Low input offset voltage: ±0.3 mV
  • Unity-gain bandwidth: 10 MHz
  • Low broadband noise: 10 nV/√Hz
  • Low input bias current: 0.5 pA
  • Low quiescent current: 538 µA
  • Unity-gain stable
  • Internal RFI and EMI filter
  • Operational at supply voltages as low as 1.8 V
  • Easier to stabilize with higher capacitive load due to resistive open-loop output impedance
  • Shutdown version: TLV906xS
  • Extended temperature range: –40°C to 125°C

The TLV9061 (single), TLV9062 (dual), and TLV9064 (quad) are single-, dual-, and quad- low-voltage (1.8 V to 5.5 V) operational amplifiers (op amps) with rail-to-rail input- and output-swing capabilities. These devices are highly cost-effective solutions for applications where low-voltage operation, a small footprint, and high capacitive load drive are required. Although the capacitive load drive of the TLV906x is 100 pF, the resistive open-loop output impedance makes stabilizing with higher capacitive loads simpler. These op amps are designed specifically for low-voltage operation (1.8 V to 5.5 V) with performance specifications similar to the OPAx316 and TLVx316 devices.

The TLV906xS devices include a shutdown mode that allow the amplifiers to switch into standby mode with typical current consumption less than 1 µA.

The TLV906xS family helps simplify system design, because the family is unity-gain stable, integrates the RFI and EMI rejection filter, and provides no phase reversal in overdrive condition.

Micro size packages, such as X2SON and X2QFN, are offered for all the channel variants (single, dual and quad), along with industry-standard packages, such as SOIC, MSOP, SOT-23, and TSSOP.

The TLV9061 (single), TLV9062 (dual), and TLV9064 (quad) are single-, dual-, and quad- low-voltage (1.8 V to 5.5 V) operational amplifiers (op amps) with rail-to-rail input- and output-swing capabilities. These devices are highly cost-effective solutions for applications where low-voltage operation, a small footprint, and high capacitive load drive are required. Although the capacitive load drive of the TLV906x is 100 pF, the resistive open-loop output impedance makes stabilizing with higher capacitive loads simpler. These op amps are designed specifically for low-voltage operation (1.8 V to 5.5 V) with performance specifications similar to the OPAx316 and TLVx316 devices.

The TLV906xS devices include a shutdown mode that allow the amplifiers to switch into standby mode with typical current consumption less than 1 µA.

The TLV906xS family helps simplify system design, because the family is unity-gain stable, integrates the RFI and EMI rejection filter, and provides no phase reversal in overdrive condition.

Micro size packages, such as X2SON and X2QFN, are offered for all the channel variants (single, dual and quad), along with industry-standard packages, such as SOIC, MSOP, SOT-23, and TSSOP.
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類型 標題 日期
* Data sheet TLV906xS 10-MHz, RRIO, CMOS Operational Amplifiers for Cost-Sensitive Systems datasheet (Rev. J) PDF | HTML 2019年 9月 16日
Product overview Bridge Sensor Solution (Rev. A) PDF | HTML 2023年 1月 27日
Application note Designing for TLV90xxS Operational Amplifiers With Shutdown (Rev. B) PDF | HTML 2022年 6月 8日
User guide SMALL-AMP-DIP Evaluation Module (EVM) (Rev. A) 2021年 7月 30日
Circuit design Sine wave generator circuit PDF | HTML 2021年 7月 21日
Application note AN-31 Amplifier Circuit Collection (Rev. D) 2020年 10月 21日
Technical article Using quad op amps to sense multiple currents PDF | HTML 2020年 2月 12日
Technical article Taking the family-first approach to op amp selection PDF | HTML 2019年 10月 18日
Technical article Low-side current sensing for high-performance cost-sensitive applications PDF | HTML 2018年 1月 22日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

SMALL-AMP-DIP-EVM — 適用於採用小尺寸封裝之運算放大器的評估模組

SMALL-AMP-DIP-EVM 提供快速簡易方式，與許多業界標準小型封裝進行介接，因而加速小型封裝運算放大器原型設計。SMALL-AMP-DIP-EVM 支援八個小型封裝選項，包括 DPW-5 (X2SON)、DSG-8 (WSON)、DCN-8 (SOT)、DDF-8 (SOT)、RUG-10 (X2QFN)、RUC-14 (X2QFN)、RGY-14 (VQFN) 和 RTE-16 (WQFN)。

使用指南: PDF
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模擬型號

TLV9062 PSpice Model (Rev. E)

SBOMAG1E.ZIP (22 KB) - PSpice Model
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模擬型號

TLV9062 TINA-TI Reference Design (Rev. C)

SBOMAG2C.ZIP (38 KB) - TINA-TI Reference Design
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模擬型號

TLV9062 TINA-TI SPICE Model (Rev. C)

SBOMAC9C.ZIP (4 KB) - TINA-TI Spice Model
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計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
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設計工具

CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器

此設計可反轉輸入訊號 VIN，並使用 1000 V/V 或 60 dB 訊號增益。具有 T 回饋網路的反相放大器可在沒有較小 R4 值或超大回饋電阻器值的情況下獲得高增益。
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設計工具

CIRCUIT060015 — 可調式參考電壓電路

此電路結合反相及非反相放大器，讓參考電壓可從負輸入電壓向上調整至輸入電壓。可加入增益以提高最大負參考位準。
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設計工具

CIRCUIT060042 — 正弦波振盪器電路

此電路使用具備 ±2.5-V 電源的四通道運算放大器來產生 10-kHz 低失真正弦波。放大器會緩衝各 RC 濾波器階段，進而產生低失真輸出。
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設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器，若負載電流上升到 1 A 以上，便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時，比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時，讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器，為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用，建議使用具推挽輸出的比較器。
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設計工具

SBOC542 — Simulation for Multiple Aperture Window Discriminator in AN-31

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支援產品和硬體

產品
一般用途運算放大器
TLV9064 — 適合成本最佳化應用的四路、5.5-V、10-MHz、RRIO 運算放大器
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設計工具

SBOC549 — Simulation for Sine Wave Generator in AN-31

支援產品和硬體

支援產品和硬體

產品
一般用途運算放大器
TLV9064 — 適合成本最佳化應用的四路、5.5-V、10-MHz、RRIO 運算放大器
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設計工具

SLOC355 — Simulation for Sine Wave Generator Circuit

支援產品和硬體

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產品
一般用途運算放大器
TLV9064 — 適合成本最佳化應用的四路、5.5-V、10-MHz、RRIO 運算放大器
硬體開發
設計工具
CIRCUIT060042 — 正弦波振盪器電路
下載
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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參考設計

TIDA-010250 — 1kW 無刷 DC 馬達逆變器參考設計

此參考設計闡明了採用 MSPM0G (Arm® Cortex®-M0+ 核心微控制器) 的馬達逆變器。此設計不僅支援 1-3 分流電阻器的無感測器磁場定向控制 (FOC) 演算法，也支援具霍爾或相位差編碼器介面 (QEI) 感測器馬達驅動演算法。此參考設計提供的軟硬體皆經過測試且隨時可用，有助於加快開發至上市時間。
Design guide: PDF
參考設計

TIDA-010025 — 配備光學模擬輸入閘極驅動器，且適用於 200-480 VAC 驅動器的三相逆變器參考設計

This reference design realizes a reinforced isolated three-phase inverter subsystem using isolated IGBT gate drivers and isolated current/voltage sensors. The UCC23513 gate driver used has a 6-pin wide body package with optical LED emulated inputs which enables its use as pin-to-pin replacement to (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-050024 — 適用於中功率音訊功率放大器的封包追蹤電源供應參考設計

This reference design delivers an envelope-tracking power supply circuit for mid-power audio power amplifier (PA) applications with TPS43061 boost controller. By adding an audio envelope signal to the FB pin, the boost converter's output voltage can change in accordance with the envelope of the (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-010027 — 適用於線路供電動作偵測器且誤報率更低的低雜訊 PIR 訊號鏈參考設計

This reference design demonstrates how to design a low noise analog signal chain for PIR-based motion detection subsystems in line-powered applications resulting in longer detection range. This reference designs offers design theory, component selection, and circuit simulations for noise, settling (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-010023 — 適用於 3 相逆變器的物美價廉 < 1% 準確的電流感測和防護參考設計

This reference design demonstrates a cost optimized three-phase inverter leg (low-side shunt) current sensing solution with high accuracy and faster response for sensorless 2-shunt or 3-shunt field oriented control (FOC). This reference design demonstrates inverter leg current sensing with full (...)
Design guide: PDF
電路圖: PDF
封裝 引腳 下載
SOIC (D) 14 檢視選項
TSSOP (PW) 14 檢視選項
WQFN (RTE) 16 檢視選項
X2QFN (RUC) 14 檢視選項
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