產品詳細資料

Technology family LVC Number of channels 1 IOL (max) (mA) 24 Supply current (max) (µA) 10 IOH (max) (mA) -24 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 1 IOL (max) (mA) 24 Supply current (max) (µA) 10 IOH (max) (mA) -24 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOT-SC70 (DCK) 5 4.2 mm² (2 mm × 2.1 mm) SOT-5X3 (DRL) 5 2.56 mm² (1.6 mm × 1.6 mm) DSBGA (YZV) 4 1.5625 mm² (— mm × — mm) X2SON (DSF) 6 1 mm² (1 mm × 1 mm) USON (DRY) 6 1.45 mm² (1.45 mm × 1 mm) X2SON (DPW) 5 0.64 mm² (0.8 mm × 0.8 mm) DSBGA (YZP) 5 2.1875 mm² (— mm × — mm) SOT-23 (DBV) 5 8.12 mm² (2.9 mm × 2.8 mm)
  • Available in ultra small 0.64mm2 package (DPW) with 0.5mm pitch
  • Supports 5V VCC operation
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 4.6ns at 3.3V
  • Low power consumption, 10µA maximum ICC
  • ±24mA output drive at 3.3V
  • Ioff supports live insertion, partial-power-down mode, and back-drive protection
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114A)
    • 200V machine model (A115A)
    • 1000V charged-device model (C101)
  • Available in ultra small 0.64mm2 package (DPW) with 0.5mm pitch
  • Supports 5V VCC operation
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 4.6ns at 3.3V
  • Low power consumption, 10µA maximum ICC
  • ±24mA output drive at 3.3V
  • Ioff supports live insertion, partial-power-down mode, and back-drive protection
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114A)
    • 200V machine model (A115A)
    • 1000V charged-device model (C101)

This single Schmitt-trigger buffer is designed for 1.65V to 5.5V VCC operation.

The SN74LVC1G17 device contains one buffer and performs the Boolean function Y = A.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G17 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8mm × 0.8mm.

This single Schmitt-trigger buffer is designed for 1.65V to 5.5V VCC operation.

The SN74LVC1G17 device contains one buffer and performs the Boolean function Y = A.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G17 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8mm × 0.8mm.

下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
針腳對針腳的功能與所比較的裝置相同。
SN74AUP1G17 現行 具有施密特觸發器輸入的單路 0.8-V 至 3.6-V 低功耗緩衝器 Voltage range 0.8V to 3.6V, average propagation delay 8ns, average drive strength 4mA

技術文件

找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 8
重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SN74LVC1G17 Single Schmitt-Trigger Buffer datasheet (Rev. Y) PDF | HTML 2025/10/28
應用說明 Designing EMC-Compliant, High-Accuracy PLC Analog Input Modules (0-10V / 4-20mA) with ADS125H18 PDF | HTML 2026/7/6
Application brief Understanding Schmitt Triggers (Rev. B) PDF | HTML 2025/4/17
Product overview Generate a Power-On Reset Pulse PDF | HTML 2023/6/14
Application brief Generate a Clock Signal from a Crystal Oscillator PDF | HTML 2020/10/8
Application brief Debounce a Switch PDF | HTML 2020/10/8
應用說明 Designing and Manufacturing with TI's X2SON Packages 2017/8/23
應用說明 Use of the CMOS Unbuffered Inverter in Oscillator Circuits 2003/11/6

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組

靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
使用指南: PDF
支援產品和硬體
有庫存
限制:
??asset.out-of-stock-ti_zh_TW??
無法提供
開發板

5-8-NL-LOGIC-EVM — 支援 5 至 8 針腳 DPW、DQE、DRY、DSF、DTM、DTQ 和 DTT 封裝的通用邏輯和轉譯 EVM

支援任何具 DTT、DRY、DPW、DTM、DQE、DQM、DSF 或 DTQ 封裝的邏輯或轉換裝置之通用 EVM。可實現靈活評估的電路板設計。

使用指南: PDF | HTML
支援產品和硬體
有庫存
限制:
??asset.out-of-stock-ti_zh_TW??
無法提供
模擬型號

HSPICE Model for SN74LVC1G17

SCEJ260.ZIP (88 KB) - HSpice 模型
支援產品和硬體
模擬型號

SN74LVC1G17 Behavioral SPICE Model

SCEM635.ZIP (7 KB) - PSpice 模型
支援產品和硬體
模擬型號

SN74LVC1G17 IBIS Model (Rev. C)

SCEM299C.ZIP (45 KB) - IBIS 模型
支援產品和硬體

許多 TI 參考設計包含 SN74LVC1G17

使用我們的參考設計選擇工具,以檢視並找出最適合您的應用和參數的設計。

封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-SC70 (DCK) 5 Ultra Librarian
SOT-5X3 (DRL) 5 Ultra Librarian
DSBGA (YZV) 4 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
USON (DRY) 6 Ultra Librarian
X2SON (DPW) 5 Ultra Librarian
DSBGA (YZP) 5 Ultra Librarian
SOT-23 (DBV) 5 Ultra Librarian

訂購與品質

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片