100-pin (PZP) package image

TFP403PZP

現行

Panelbus DVI 接收器 | PZP | 100 | 0 to 70

與此相同: TFP403PZP.A, TFP403PZPG4 此零件編號與上方所列零件編號相同。您只能依上方所列零件編號的數量訂購。
  • 庫存:
    限制: 設下此限制以保護用於設計評估的樣品購買,一旦有更多庫存可用,就會移除該限制。
缺貨
Not available

定價

數量 價格
+

品質資訊

等級 Catalog
RoHS Yes
REACH Yes
引腳鍍層 / 焊球材質 NiPdAu
MSL 等級 / 迴焊峰值 Level-3-260C-168 HR
品質、可靠性
及包裝資訊

內含資訊:

  • RoHS
  • REACH
  • 產品標記
  • 引腳鍍層 / 焊球材質
  • MSL 等級 / 迴焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
檢視或下載
其他製造資訊

內含資訊:

  • 晶圓廠位置
  • 組裝地點
檢視

出口分類

*僅供參考

  • 美國 ECCN:EAR99

封裝資訊

封裝 | 針腳 HTQFP (PZP) | 100
操作溫度範圍 (°C) 0 to 70
包裝數量 | 運送業者 90 | JEDEC TRAY (10+1)

TFP403 的特色

  • Supports Pixel Rates Up to 165MHz
    (Including 1080p and WUXGA at 60 Hz)
  • Digital Visual Interface (DVI 1.0)
    Specification Compliant(1)
  • Pin-for-Pin Compatible With TFP501 for
    Simple Upgrade Path to HDCP2
  • True-Color, 24 Bit/Pixel, 16.7M Colors at
    1 or 2-Pixels per Clock
  • Laser Trimmed (50 Ω) Input Stage for
    Optimum Fixed Impedance Matching
  • Skew Tolerant up to One Pixel Clock Cycle
    (High Clock and Data Jitter Tolerance)
  • 4x Over-Sampling for Reduced Bit-Error Rates and
    Better Performance Over Longer Cables
  • Reduced Power Consumption—1.8-V Core
    Operation With 3.3 V I/Os and Supplies3
  • Reduced Ground Bounce Using Time Staggered Pixel Outputs
  • Lowest Noise and Best Power Dissipation
    Using PowerPAD™ Packaging
  • Advanced Technology Using TI 0.18-µm
    EPIC-5™ CMOS Process
  • Supports Hot Plug Detection

(1) The Digital Visual Interface Specification (DVI) is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TFP403 is compliant with the DVI Specification Rev. 1.0.
2 High-bandwidth digital content protection (HDCP) is the system used for protecting DVI outputs from being copied. The TFP501 is TI’s DVI receiver with HDCP functionality.
3 The TFP403 has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V supplies.
PanelBus, PowerPAD, and EPIC-5 are trademarks of Texas Instruments.

TFP403 的說明

The Texas Instruments TFP403 is a PanelBus™ flat panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP403 finds applications in any design requiring high-speed digital interface.

The TFP403 supports display resolutions up to 1080p and WUXGA in 24-bit true color pixel format. The TFP403 offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce.

PowerPAD advanced packaging technology results in best of class power dissipation, footprint, and ultralow ground inductance.

The TFP403 combines PanelBus™ circuit innovation with TIs advanced 0.18-µm EPIC-5™ CMOS process technology, along with PowerPAD™ package technology to achieve a reliable, low-powered, low-noise, high-speed digital interface solution.

  • 庫存:
    限制: 設下此限制以保護用於設計評估的樣品購買,一旦有更多庫存可用,就會移除該限制。
缺貨
Not available

定價

數量 價格
+

包裝類型選項

您可依零件數量選擇不同包裝類型選項,包含完整捲盤、客製化捲盤、剪切捲帶、承載管或盤。

客製化捲盤是從一個捲盤上剪切下來的連續剪切捲帶,以維持批次和日期代碼可追溯性,依要求剪切至確切數量。依照業界標準,銅墊片會在剪切捲帶兩側連接 18 英吋前後導帶,以直接送至自動組裝機器。針對客製化捲盤訂單,TI 將酌收捲帶封裝費用。

剪切捲帶是從捲盤剪切下來的一段捲帶。TI 可能使用多條剪切捲帶或承載盒,以滿足訂單要求數量。

TI 常以盒裝或管裝、盤裝方式運送承載管裝置,視現有庫存而定。所有捲帶、管或樣本盒之封裝,皆符合公司內部靜電放電與防潮保護包裝要求。

進一步了解

可提供批次和日期代碼選擇

在購物車中加入數量,並開始結帳流程以檢視可用選項,從現有庫存中選擇批次或日期代碼。

進一步了解